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Searched refs:res3 (Results 1 – 25 of 84) sorted by relevance

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/external/libvpx/libvpx/vp8/common/mips/msa/
Didct_msa.c91 v4i32 res0, res1, res2, res3; in idct4x4_addblk_msa() local
105 res2, res3); in idct4x4_addblk_msa()
106 ILVR_H4_SW(zero, res0, zero, res1, zero, res2, zero, res3, res0, res1, res2, in idct4x4_addblk_msa()
107 res3); in idct4x4_addblk_msa()
108 ADD4(res0, vt0, res1, vt1, res2, vt2, res3, vt3, res0, res1, res2, res3); in idct4x4_addblk_msa()
112 res3 = CLIP_SW_0_255(res3); in idct4x4_addblk_msa()
113 PCKEV_B2_SW(res0, res1, res2, res3, vt0, vt1); in idct4x4_addblk_msa()
121 v8i16 vec, res0, res1, res2, res3, dst0, dst1; in idct4x4_addconst_msa() local
129 res2, res3); in idct4x4_addconst_msa()
130 ADD4(res0, vec, res1, vec, res2, vec, res3, vec, res0, res1, res2, res3); in idct4x4_addconst_msa()
[all …]
/external/llvm/test/Bitcode/
DbinaryIntInstructions.3.2.ll16 ; CHECK-NEXT: %res3 = add i16 %x3, %x3
17 %res3 = add i16 %x3, %x3
45 ; CHECK-NEXT: %res3 = add nuw nsw <4 x i8> %x3, %x3
46 %res3 = add nuw nsw <4 x i8> %x3, %x3
65 ; CHECK-NEXT: %res3 = add nuw nsw <4 x i16> %x3, %x3
66 %res3 = add nuw nsw <4 x i16> %x3, %x3
85 ; CHECK-NEXT: %res3 = add nuw nsw <4 x i32> %x3, %x3
86 %res3 = add nuw nsw <4 x i32> %x3, %x3
105 ; CHECK-NEXT: %res3 = add nuw nsw <4 x i64> %x3, %x3
106 %res3 = add nuw nsw <4 x i64> %x3, %x3
[all …]
DbinaryFloatInstructions.3.2.ll16 ; CHECK-NEXT: %res3 = fadd half %x3, %x3
17 %res3 = fadd half %x3, %x3
39 ; CHECK-NEXT: %res3 = fadd <4 x float> %x3, %x3
40 %res3 = fadd <4 x float> %x3, %x3
59 ; CHECK-NEXT: %res3 = fadd <4 x double> %x3, %x3
60 %res3 = fadd <4 x double> %x3, %x3
79 ; CHECK-NEXT: %res3 = fadd <4 x half> %x3, %x3
80 %res3 = fadd <4 x half> %x3, %x3
DmiscInstructions.3.2.ll81 ; CHECK-NEXT: %res3 = icmp ugt i32 %x1, %x2
82 %res3 = icmp ugt i32 %x1, %x2
123 ; CHECK-NEXT: %res3 = fcmp ugt float %x1, %x2
124 %res3 = fcmp ugt float %x1, %x2
182 ; CHECK-NEXT: %res3 = call i32 (i8*, ...) @printf(i8* %msg, i32 12, i8 42)
183 %res3 = call i32 (i8*, ...) @printf(i8* %msg, i32 12, i8 42)
DconstantsTest.3.2.ll29 ; CHECK-NEXT: %res3 = add i32 0, 0
30 %res3 = add i32 0, 0
50 ; CHECK-NEXT: %res3 = add <2 x i32> <i32 1, i32 1>, <i32 1, i32 1>
51 %res3 = add <2 x i32> <i32 1, i32 1>, <i32 1, i32 1>
DaggregateInstructions.3.2.ll16 ; CHECK-NEXT: %res3 = extractvalue [4 x [4 x i8]] %x2, 0, 1
17 %res3 = extractvalue [4 x [4 x i8 ]] %x2, 0, 1
/external/valgrind/memcheck/tests/
Dbuflen_check.c8 int res1, res2, res3; in main() local
19 res3 = getsockname(res1, &name, NULL); /* NULL is bogus */ in main()
23 if (res3 == -1) { in main()
/external/eigen/unsupported/test/
Dautodiff_scalar.cpp58 AD res3 = cosh(val); in check_hyperbolic_functions() local
59 VERIFY_IS_APPROX(res3.value(), cosh_px); in check_hyperbolic_functions()
60 VERIFY_IS_APPROX(res3.derivatives().x(), std::sinh(p.x())); in check_hyperbolic_functions()
71 res3 = cosh(val); in check_hyperbolic_functions()
72 VERIFY_IS_APPROX(res3.derivatives().x(), Scalar(0.339540557256150)); in check_hyperbolic_functions()
/external/swiftshader/third_party/subzero/crosstest/
Dtest_vector_ops_ll.ll18 %res3 = insertelement <4 x float> %vec, float %elt, i32 3
19 ret <4 x float> %res3
47 %res3 = zext <4 x i1> %res3_i1 to <4 x i32>
48 ret <4 x i32> %res3
80 %res3 = zext <8 x i1> %res3_i1 to <8 x i16>
81 ret <8 x i16> %res3
137 %res3 = zext <16 x i1> %res3_i1 to <16 x i8>
138 ret <16 x i8> %res3
210 %res3 = insertelement <4 x i32> %vec, i32 %elt, i32 3
211 ret <4 x i32> %res3
[all …]
/external/swiftshader/third_party/subzero/tests_lit/assembler/x86/
Dopcode_register_encodings.ll24 %res3 = sub <8 x i16> %arg0, %arg3
31 %res_acc2 = select <8 x i1> %cond, <8 x i16> %res3, <8 x i16> %res4
64 %res3 = sub <4 x i32> %arg0, %arg3
71 %res_acc2 = select <4 x i1> %cond, <4 x i32> %res3, <4 x i32> %res4
128 %res3 = load <16 x i8>, <16 x i8>* %addr3_v16xI8, align 1
130 %res123 = add <16 x i8> %res12, %res3
180 %res3 = insertelement <4 x i32> %res2, i32 %elt1, i32 3
181 ret <4 x i32> %res3
199 %res3 = insertelement <16 x i8> %res2, i8 %elt1, i32 15
200 ret <16 x i8> %res3
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/external/libvpx/libvpx/vpx_dsp/mips/
Dvpx_convolve8_avg_horiz_msa.c20 v16u8 dst0, dst1, dst2, dst3, res2, res3; in common_hz_8t_and_aver_dst_4x4_msa() local
42 PCKEV_B2_UB(res0, res0, res1, res1, res2, res3); in common_hz_8t_and_aver_dst_4x4_msa()
44 XORI_B2_128_UB(res2, res3); in common_hz_8t_and_aver_dst_4x4_msa()
45 AVER_UB2_UB(res2, dst0, res3, dst2, res2, res3); in common_hz_8t_and_aver_dst_4x4_msa()
46 ST4x4_UB(res2, res3, 0, 1, 0, 1, dst, dst_stride); in common_hz_8t_and_aver_dst_4x4_msa()
54 v16u8 mask0, mask1, mask2, mask3, res0, res1, res2, res3; in common_hz_8t_and_aver_dst_4x8_msa() local
82 res3); in common_hz_8t_and_aver_dst_4x8_msa()
83 ILVR_D2_UB(res1, res0, res3, res2, res0, res2); in common_hz_8t_and_aver_dst_4x8_msa()
338 v16u8 filt0, vec0, vec1, vec2, vec3, res0, res1, res2, res3; in common_hz_2t_and_aver_dst_4x8_msa() local
356 res3); in common_hz_2t_and_aver_dst_4x8_msa()
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Dintrapred8_dspr2.c155 int32_t res0, res1, res2, res3; in vpx_tm_predictor_8x8_dspr2() local
597 [left0] "=&r"(left0), [res2] "=&r"(res2), [res3] "=&r"(res3), in vpx_tm_predictor_8x8_dspr2()
Didct16x16_msa.c266 v8i16 vec, res0, res1, res2, res3, res4, res5, res6, res7; in vpx_idct16x16_1_add_msa() local
280 UNPCK_UB_SH(dst3, res3, res7); in vpx_idct16x16_1_add_msa()
281 ADD4(res0, vec, res1, vec, res2, vec, res3, vec, res0, res1, res2, res3); in vpx_idct16x16_1_add_msa()
283 CLIP_SH4_0_255(res0, res1, res2, res3); in vpx_idct16x16_1_add_msa()
285 PCKEV_B4_UB(res4, res0, res5, res1, res6, res2, res7, res3, tmp0, tmp1, in vpx_idct16x16_1_add_msa()
330 v8i16 res0, res1, res2, res3, res4, res5, res6, res7; in vpx_iadst16_1d_columns_addblk_msa() local
468 ILVR_B2_SH(zero, dst2, zero, dst3, res2, res3); in vpx_iadst16_1d_columns_addblk_msa()
469 ADD2(res2, out2, res3, out3, res2, res3); in vpx_iadst16_1d_columns_addblk_msa()
470 CLIP_SH2_0_255(res2, res3); in vpx_iadst16_1d_columns_addblk_msa()
471 PCKEV_B2_SH(res2, res2, res3, res3, res2, res3); in vpx_iadst16_1d_columns_addblk_msa()
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/external/llvm/test/CodeGen/X86/
Dmerge-consecutive-loads-512.ll132 %res3 = insertelement <8 x double> %res2, double 0.0, i32 3
133 %res6 = insertelement <8 x double> %res3, double 0.0, i32 6
218 %res3 = insertelement <8 x i64> %res2, i64 0, i32 3
219 %res4 = insertelement <8 x i64> %res3, i64 %val4, i32 4
276 %res3 = insertelement <16 x float> %res2, float 0.0, i32 3
277 %res4 = insertelement <16 x float> %res3, float 0.0, i32 4
301 %res3 = insertelement <16 x float> %res1, float %val3, i32 3
302 ret <16 x float> %res3
327 %res3 = insertelement <16 x float> %res0, float %val3, i32 3
328 %resC = insertelement <16 x float> %res3, float %valC, i32 12
[all …]
Davx512ifmavl-intrinsics.ll25 …%res3 = call <2 x i64> @llvm.x86.avx512.mask.vpmadd52h.uq.128(<2 x i64> %x0, <2 x i64> %x1, <2 x i…
27 %res5 = add <2 x i64> %res3, %res2
53 …%res3 = call <4 x i64> @llvm.x86.avx512.mask.vpmadd52h.uq.256(<4 x i64> %x0, <4 x i64> %x1, <4 x i…
55 %res5 = add <4 x i64> %res3, %res2
81 …%res3 = call <2 x i64> @llvm.x86.avx512.maskz.vpmadd52h.uq.128(<2 x i64> %x0, <2 x i64> %x1, <2 x …
83 %res5 = add <2 x i64> %res3, %res2
109 …%res3 = call <4 x i64> @llvm.x86.avx512.maskz.vpmadd52h.uq.256(<4 x i64> %x0, <4 x i64> %x1, <4 x …
111 %res5 = add <4 x i64> %res3, %res2
137 …%res3 = call <2 x i64> @llvm.x86.avx512.mask.vpmadd52l.uq.128(<2 x i64> %x0, <2 x i64> %x1, <2 x i…
139 %res5 = add <2 x i64> %res3, %res2
[all …]
Davx512vbmi-intrinsics.ll18 %res3 = add <64 x i8> %res, %res1
19 %res4 = add <64 x i8> %res3, %res2
35 %res3 = add <64 x i8> %res, %res1
36 %res4 = add <64 x i8> %res3, %res2
57 %res3 = add <64 x i8> %res, %res1
58 %res4 = add <64 x i8> %res3, %res2
79 %res3 = add <64 x i8> %res, %res1
80 %res4 = add <64 x i8> %res3, %res2
Davx512vbmivl-intrinsics.ll18 %res3 = add <16 x i8> %res, %res1
19 %res4 = add <16 x i8> %res3, %res2
38 %res3 = add <32 x i8> %res, %res1
39 %res4 = add <32 x i8> %res3, %res2
58 %res3 = add <16 x i8> %res, %res1
59 %res4 = add <16 x i8> %res3, %res2
78 %res3 = add <32 x i8> %res, %res1
79 %res4 = add <32 x i8> %res3, %res2
100 %res3 = add <16 x i8> %res, %res1
101 %res4 = add <16 x i8> %res3, %res2
[all …]
Davx512ifma-intrinsics.ll22 …%res3 = call <8 x i64> @llvm.x86.avx512.mask.vpmadd52h.uq.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i…
24 %res5 = add <8 x i64> %res3, %res2
48 …%res3 = call <8 x i64> @llvm.x86.avx512.maskz.vpmadd52h.uq.512(<8 x i64> %x0, <8 x i64> %x1, <8 x …
50 %res5 = add <8 x i64> %res3, %res2
74 …%res3 = call <8 x i64> @llvm.x86.avx512.mask.vpmadd52l.uq.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i…
76 %res5 = add <8 x i64> %res3, %res2
100 …%res3 = call <8 x i64> @llvm.x86.avx512.maskz.vpmadd52l.uq.512(<8 x i64> %x0, <8 x i64> %x1, <8 x …
102 %res5 = add <8 x i64> %res3, %res2
Dmerge-consecutive-loads-256.ll71 %res3 = insertelement <4 x double> %res2, double %val3, i32 3
72 ret <4 x double> %res3
159 %res3 = insertelement <4 x double> %res2, double %val3, i32 3
160 ret <4 x double> %res3
206 %res3 = insertelement <4 x i64> %res2, i64 %val3, i32 3
207 ret <4 x i64> %res3
333 %res3 = insertelement <8 x float> %res2, float 0.0, i32 3
334 %res6 = insertelement <8 x float> %res3, float 0.0, i32 6
425 %res3 = insertelement <8 x i32> %res2, i32 0, i32 3
426 %res4 = insertelement <8 x i32> %res3, i32 %val4, i32 4
[all …]
Dmerge-consecutive-loads-128.ll88 %res3 = insertelement <4 x float> %res2, float %val3, i32 3
89 ret <4 x float> %res3
177 %res3 = insertelement <4 x float> %res1, float %val3, i32 3
178 ret <4 x float> %res3
243 %res3 = insertelement <4 x float> %res2, float undef, i32 3
244 ret <4 x float> %res3
284 %res3 = insertelement <4 x float> %res2, float undef, i32 3
285 ret <4 x float> %res3
312 %res3 = insertelement <4 x i32> %res1, i32 %val3, i32 3
313 ret <4 x i32> %res3
[all …]
/external/icu/icu4c/source/test/intltest/
Dnmfmapts.cpp124 UnicodeString res1, res2, res3, res4, res5, res6; in testAPI() local
133 res3 = cur_fr->format(d, res3, pos1); in testAPI()
134 logln( (UnicodeString) "" + (int32_t) d + " formatted to " + res3); in testAPI()
332 UnicodeString res0, res1, res2, res3, res4, res5; in testRegistration() local
340 f3->format(n, res3); in testRegistration()
351 logln((UnicodeString)"f3 reg cur: " + res3); in testRegistration()
365 if (res3 != res0) { in testRegistration()
/external/icu/android_icu4j/src/main/tests/android/icu/dev/test/format/
DIntlTestNumberFormatAPI.java86 StringBuffer res3 = new StringBuffer(); in TestAPI() local
101 res3 = cur_fr.format(d, res3, pos1); in TestAPI()
102 logln( "" + d + " formatted to " + res3); in TestAPI()
DIntlTestDateFormatAPI.java105 String res3 = new String(); in TestAPI() local
115 res3 = de.format(d); in TestAPI()
116 logln("" + d.getTime() + " formatted to " + res3); in TestAPI()
/external/icu/icu4j/main/tests/core/src/com/ibm/icu/dev/test/format/
DIntlTestNumberFormatAPI.java85 StringBuffer res3 = new StringBuffer(); in TestAPI() local
100 res3 = cur_fr.format(d, res3, pos1); in TestAPI()
101 logln( "" + d + " formatted to " + res3); in TestAPI()
/external/llvm/test/CodeGen/SystemZ/
Dasm-18.ll373 %res3 = call i32 asm "stepc $0, $1", "=h,h"(i32 %or2)
374 %or3 = or i32 %res3, 12345678
394 %res3 = call i32 asm "stepc $0, $1", "=r,r"(i32 %or2)
395 %or3 = or i32 %res3, 12345678
415 %res3 = call i32 asm "stepc $0, $1", "=h,h"(i32 %xor2)
416 %xor3 = xor i32 %res3, 12345678
436 %res3 = call i32 asm "stepc $0, $1", "=r,r"(i32 %xor2)
437 %xor3 = xor i32 %res3, 12345678
457 %res3 = call i32 asm "stepc $0, $1", "=h,h"(i32 %and2)
458 %and3 = and i32 %res3, 12345678
[all …]

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