| /external/llvm/test/MC/ARM/ |
| D | thumb_rewrites.s | 89 rors r0, r0, r1
90 @ CHECK: rors r0, r1 @ encoding: [0xc8,0x41]
|
| D | thumb2-narrow-dp.ll | 666 // CHECK: rors.w r3, r2, r1 @ encoding: [0x72,0xfa,0x01,0xf3]
667 // CHECK: rors r0, r1 @ encoding: [0xc8,0x41]
668 // CHECK: rors.w r1, r0, r1 @ encoding: [0x70,0xfa,0x01,0xf1]
669 // CHECK: rors.w r2, r2, r1 @ encoding: [0x72,0xfa,0x01,0xf2]
670 // CHECK: rors.w r2, r1, r2 @ encoding: [0x71,0xfa,0x02,0xf2]
672 // CHECK: rors r7, r1 @ encoding: [0xcf,0x41]
673 // CHECK: rors.w r8, r1, r8 @ encoding: [0x71,0xfa,0x08,0xf8]
674 // CHECK: rors.w r8, r8, r1 @ encoding: [0x78,0xfa,0x01,0xf8]
675 // CHECK: rors.w r6, r8, r6 @ encoding: [0x78,0xfa,0x06,0xf6]
676 // CHECK: rors.w r6, r6, r8 @ encoding: [0x76,0xfa,0x08,0xf6]
|
| D | basic-thumb-instructions.s | 486 rors r2, r7
488 @ CHECK: rors r2, r7 @ encoding: [0xfa,0x41]
|
| D | basic-thumb2-instructions.s | 1488 @ CHECK: rors.w r6, r2, #5 @ encoding: [0x5f,0xea,0x72,0x16]
1492 @ CHECK: rors r4, r5 @ encoding: [0xec,0x41]
1494 @ CHECK: rors.w r4, r4, r8 @ encoding: [0x74,0xfa,0x08,0xf4]
1983 rors r8, r3, #31
1984 rors.w r2, r3, #1
1986 rors r2, r12, #15
1989 rors r8, #2
1990 rors.w r7, #5
1994 @ CHECK: rors.w r8, r3, #31 @ encoding: [0x5f,0xea,0xf3,0x78]
1995 @ CHECK: rors.w r2, r3, #1 @ encoding: [0x5f,0xea,0x73,0x02]
[all …]
|
| /external/valgrind/none/tests/arm/ |
| D | v6intARM.stdout.exp | 323 rors r0, r1, r2 :: rd 0x00088000 rm 0x00088000, rn 0x00000000, carryin 0, cpsr 0x00000000
324 rors r0, r1, r2 :: rd 0x80088000 rm 0x80088000, rn 0x00000000, carryin 0, cpsr 0x80000000 N
325 rors r0, r1, r2 :: rd 0x00044000 rm 0x00088000, rn 0x00000001, carryin 0, cpsr 0x00000000
326 rors r0, r1, r2 :: rd 0x00022000 rm 0x00088000, rn 0x00000002, carryin 0, cpsr 0x00000000
327 rors r0, r1, r2 :: rd 0x00110000 rm 0x00088000, rn 0x0000001f, carryin 0, cpsr 0x00000000
328 rors r0, r1, r2 :: rd 0x00088000 rm 0x00088000, rn 0x00000020, carryin 0, cpsr 0x00000000
329 rors r0, r1, r2 :: rd 0x00044000 rm 0x00088000, rn 0x00000021, carryin 0, cpsr 0x00000000
330 rors r0, r1, r2 :: rd 0x00110000 rm 0x00088000, rn 0x0000003f, carryin 0, cpsr 0x00000000
331 rors r0, r1, r2 :: rd 0x00088000 rm 0x00088000, rn 0x00000040, carryin 0, cpsr 0x00000000
332 rors r0, r1, r2 :: rd 0x00110000 rm 0x00088000, rn 0x000000ff, carryin 0, cpsr 0x00000000
[all …]
|
| D | v6intThumb.stdout.exp | 479 rors r1, r2 :: rd 0x31415927 rm 0x00000000, c:v-in 0, cpsr 0x00000000
480 rors r1, r2 :: rd 0x98a0ac93 rm 0x00000001, c:v-in 0, cpsr 0xa0000000 N C
481 rors r1, r2 :: rd 0xcc505649 rm 0x00000002, c:v-in 0, cpsr 0xa0000000 N C
482 rors r1, r2 :: rd 0xb24e6282 rm 0x0000000f, c:v-in 0, cpsr 0xa0000000 N C
483 rors r1, r2 :: rd 0x59273141 rm 0x00000010, c:v-in 0, cpsr 0x00000000
484 rors r1, r2 :: rd 0x6282b24e rm 0x0000001f, c:v-in 0, cpsr 0x00000000
485 rors r1, r2 :: rd 0x31415927 rm 0x00000020, c:v-in 0, cpsr 0x00000000
486 rors r1, r2 :: rd 0x98a0ac93 rm 0x00000021, c:v-in 0, cpsr 0xa0000000 N C
487 rors r1, r2 :: rd 0x31415927 rm 0x00000000, c:v-in 1, cpsr 0x10000000 V
488 rors r1, r2 :: rd 0x98a0ac93 rm 0x00000001, c:v-in 1, cpsr 0xb0000000 N CV
[all …]
|
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| D | basic-thumb-instructions.s | 435 rors r2, r7
437 @ CHECK: rors r2, r7 @ encoding: [0xfa,0x41]
|
| D | basic-thumb2-instructions.s | 1556 rors r8, r3, #31
1557 rors.w r2, r3, #1
1559 rors r2, r12, #15
1562 rors r8, #2
1563 rors.w r7, #5
1567 @ CHECK: rors.w r8, r3, #31 @ encoding: [0x5f,0xea,0xf3,0x78]
1568 @ CHECK: rors.w r2, r3, #1 @ encoding: [0x5f,0xea,0x73,0x02]
1570 @ CHECK: rors.w r2, r12, #15 @ encoding: [0x5f,0xea,0xfc,0x32]
1573 @ CHECK: rors.w r8, r8, #2 @ encoding: [0x5f,0xea,0xb8,0x08]
1574 @ CHECK: rors.w r7, r7, #5 @ encoding: [0x5f,0xea,0x77,0x17]
[all …]
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | thumb1.txt | 356 # CHECK: rors r2, r7
|
| D | thumb2.txt | 1495 # CHECK: rors.w r8, r3, #31
1496 # CHECK: rors.w r2, r3, #1
1498 # CHECK: rors.w r2, r12, #15
1501 # CHECK: rors.w r8, r8, #2
1502 # CHECK: rors.w r7, r7, #5
1522 # CHECK: rors.w r3, r4, r8
|
| /external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
| D | thumb1.txt | 347 # CHECK: rors r2, r7
|
| D | thumb2.txt | 1356 # CHECK: rors.w r8, r3, #31
1357 # CHECK: rors.w r2, r3, #1
1359 # CHECK: rors.w r2, r12, #15
1362 # CHECK: rors.w r8, r8, #2
1363 # CHECK: rors.w r7, r7, #5
1383 # CHECK: rors.w r3, r4, r8
|
| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 2820 void rors(Condition cond,
2825 void rors(Register rd, Register rm, const Operand& operand) { in rors() function
2826 rors(al, Best, rd, rm, operand); in rors()
2828 void rors(Condition cond, Register rd, Register rm, const Operand& operand) { in rors() function
2829 rors(cond, Best, rd, rm, operand); in rors()
2831 void rors(EncodingSize size, in rors() function
2835 rors(al, size, rd, rm, operand); in rors()
|
| D | disasm-aarch32.h | 893 void rors(Condition cond,
|
| D | disasm-aarch32.cc | 2289 void Disassembler::rors(Condition cond, in rors() function in vixl::aarch32::Disassembler
7547 rors(Condition::None(), in DecodeT32()
18910 rors(CurrentCond(), in DecodeT32()
20828 rors(Condition::None(), in DecodeT32()
20835 rors(CurrentCond(), in DecodeT32()
59709 rors(condition, Best, Register(rd), Register(rm), amount); in DecodeA32()
60043 rors(condition, in DecodeA32()
|
| D | assembler-aarch32.cc | 8215 void Assembler::rors(Condition cond, in rors() function in vixl::aarch32::Assembler
8267 Delegate(kRors, &Assembler::rors, cond, size, rd, rm, operand); in rors()
|
| D | macro-assembler-aarch32.h | 3221 rors(cond, rd, rm, operand); in Rors()
|
| /external/vixl/test/aarch32/ |
| D | test-assembler-cond-rd-rn-operand-rm-a32.cc | 85 M(rors)
|
| D | test-assembler-cond-rd-rn-operand-rm-t32.cc | 85 M(rors)
|