Searched refs:rsrc2 (Results 1 – 9 of 9) sorted by relevance
81 uint32_t rsrc2 = code_object->compute_pgm_resource_registers >> 32; in code_object_to_config() local86 out_config->lds_size = MAX2(out_config->lds_size, G_00B84C_LDS_SIZE(rsrc2)); in code_object_to_config()87 out_config->rsrc2 = rsrc2; in code_object_to_config()146 shader->config.rsrc2 = S_00B84C_USER_SGPR(SI_CS_NUM_USER_SGPR) | in si_create_compute_state()356 config->rsrc2 &= C_00B84C_LDS_SIZE; in si_switch_compute_shader()357 config->rsrc2 |= S_00B84C_LDS_SIZE(lds_blocks); in si_switch_compute_shader()391 radeon_emit(cs, config->rsrc2); in si_switch_compute_shader()394 "COMPUTE_PGM_RSRC2: 0x%08x\n", config->rsrc1, config->rsrc2); in si_switch_compute_shader()
475 unsigned rsrc2; member
184 ls_rsrc2 = ls->current->config.rsrc2; in si_emit_derived_tess_state()
369 shader->config.rsrc2 = S_00B52C_USER_SGPR(SI_LS_NUM_USER_SGPR) | in si_shader_ls()
6064 conf->rsrc2 = value; in si_shader_binary_read_config()
38 uint32_t rsrc1, rsrc2; member168 variant->rsrc2 = entry->rsrc2; in radv_create_shader_variant_from_pipeline_cache()287 entry->rsrc2 = variant->rsrc2; in radv_pipeline_cache_insert_shader()
366 variant->rsrc2 = S_00B12C_USER_SGPR(variant->info.num_user_sgprs) | in radv_fill_shader_variant()371 variant->rsrc2 = S_00B12C_USER_SGPR(variant->info.num_user_sgprs) | in radv_fill_shader_variant()375 variant->rsrc2 = S_00B84C_USER_SGPR(variant->info.num_user_sgprs) | in radv_fill_shader_variant()
852 unsigned rsrc2; member
494 radeon_emit(cmd_buffer->cs, vs->rsrc2); in radv_emit_vertex_shader()543 radeon_emit(cmd_buffer->cs, ps->rsrc2); in radv_emit_fragment_shader()1630 radeon_emit(cmd_buffer->cs, compute_shader->rsrc2); in radv_emit_compute_pipeline()