| /external/libhevc/common/arm/ |
| D | ihevc_itrans_recon_8x8.s | 248 vadd.s32 q5,q10,q11 @// c0 = y0 * cos4 + y4 * cos4(part of a0 and a1)
249 vsub.s32 q10,q10,q11 @// c1 = y0 * cos4 - y4 * cos4(part of a0 and a1)
256 vadd.s32 q7,q5,q3 @// a0 = c0 + d0(part of r0,r7)
257 vsub.s32 q5,q5,q3 @// a3 = c0 - d0(part of r3,r4)
258 vsub.s32 q11,q10,q9 @// a2 = c1 - d1(part of r2,r5)
259 vadd.s32 q9,q10,q9 @// a1 = c1 + d1(part of r1,r6)
261 vadd.s32 q10,q7,q12 @// a0 + b0(part of r0)
262 vsub.s32 q3,q7,q12 @// a0 - b0(part of r7)
264 vadd.s32 q12,q11,q14 @// a2 + b2(part of r2)
265 vsub.s32 q11,q11,q14 @// a2 - b2(part of r5)
[all …]
|
| D | ihevc_itrans_recon_4x4.s | 165 vshl.s32 q5,q5,#6 @e[0] = 64*(pi2_src[0] + pi2_src[2])
166 vshl.s32 q6,q6,#6 @e[1] = 64*(pi2_src[0] - pi2_src[2])
168 vadd.s32 q7,q5,q3 @((e[0] + o[0] )
169 vadd.s32 q8,q6,q4 @((e[1] + o[1])
170 vsub.s32 q9,q6,q4 @((e[1] - o[1])
171 vsub.s32 q10,q5,q3 @((e[0] - o[0])
173 vqrshrn.s32 d0,q7,#shift_stage1_idct @pi2_out[0] = clip_s16((e[0] + o[0] + add)>>shift) )
174 vqrshrn.s32 d1,q8,#shift_stage1_idct @pi2_out[1] = clip_s16((e[1] + o[1] + add)>>shift) )
175 vqrshrn.s32 d2,q9,#shift_stage1_idct @pi2_out[2] = clip_s16((e[0] - o[0] + add)>>shift) )
176 vqrshrn.s32 d3,q10,#shift_stage1_idct @pi2_out[3] = clip_s16((e[0] - o[0] + add)>>shift) )
[all …]
|
| D | ihevc_weighted_pred_bi.s | 183 vneg.s32 q14,q14
208 vadd.s32 q2,q2,q4 @vaddq_s32(i4_tmp1_t1, i4_tmp1_t2)
214 vadd.s32 q2,q2,q15 @vaddq_s32(i4_tmp1_t1, tmp_lvl_shift_t)
219 vshl.s32 q2,q2,q14 @vshlq_s32(i4_tmp1_t1, tmp_shift_t)
222 vadd.s32 q5,q5,q6 @vaddq_s32(i4_tmp2_t1, i4_tmp2_t2) ii iteration
224 vqmovun.s32 d4,q2 @vqmovun_s32(sto_res_tmp1)
227 vadd.s32 q5,q5,q15 @vaddq_s32(i4_tmp2_t1, tmp_lvl_shift_t) ii iteration
228 vmov.s32 d5,d4 @vcombine_u16(sto_res_tmp2, sto_res_tmp2)
229 vadd.s32 q7,q7,q8 @vaddq_s32(i4_tmp1_t1, i4_tmp1_t2) iii iteration
231 vshl.s32 q5,q5,q14 @vshlq_s32(i4_tmp2_t1, tmp_shift_t) ii iteration
[all …]
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| D | ihevc_itrans_recon_16x16.s | 371 vadd.s32 q10,q6,q12
372 vsub.s32 q11,q6,q12
374 vadd.s32 q6,q7,q13
375 vsub.s32 q12,q7,q13
377 vadd.s32 q7,q8,q14
378 vsub.s32 q13,q8,q14
381 vadd.s32 q8,q9,q15
382 vsub.s32 q14,q9,q15
390 vqrshrn.s32 d30,q10,#shift_stage1_idct @// r0 = (a0 + b0 + rnd) >> 7(shift_stage1_idct)
391 vqrshrn.s32 d19,q11,#shift_stage1_idct @// r7 = (a0 - b0 + rnd) >> 7(shift_stage1_idct)
[all …]
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| /external/boringssl/src/crypto/curve25519/asm/ |
| D | x25519-asm-arm.S | 329 vmull.s32 q12,d2,d2
330 vmlal.s32 q12,d11,d1
331 vmlal.s32 q12,d12,d0
332 vmlal.s32 q12,d13,d23
333 vmlal.s32 q12,d16,d22
334 vmlal.s32 q12,d7,d21
335 vmull.s32 q10,d2,d11
336 vmlal.s32 q10,d4,d1
337 vmlal.s32 q10,d13,d0
338 vmlal.s32 q10,d6,d23
[all …]
|
| /external/libmpeg2/common/arm/ |
| D | impeg2_idct.s | 221 vdup.s32 q0, r4
233 vraddhn.s32 d12, q0, q4
234 vraddhn.s32 d13, q0, q5
243 vraddhn.s32 d12, q0, q4
244 vraddhn.s32 d13, q0, q5
253 vraddhn.s32 d12, q0, q4
254 vraddhn.s32 d13, q0, q5
263 vraddhn.s32 d12, q0, q4
264 vraddhn.s32 d13, q0, q5
273 vraddhn.s32 d12, q0, q4
[all …]
|
| /external/llvm/test/MC/ARM/ |
| D | neon-convert-encoding.s | 3 @ CHECK: vcvt.s32.f32 d16, d16 @ encoding: [0x20,0x07,0xfb,0xf3]
4 vcvt.s32.f32 d16, d16
7 @ CHECK: vcvt.f32.s32 d16, d16 @ encoding: [0x20,0x06,0xfb,0xf3]
8 vcvt.f32.s32 d16, d16
11 @ CHECK: vcvt.s32.f32 q8, q8 @ encoding: [0x60,0x07,0xfb,0xf3]
12 vcvt.s32.f32 q8, q8
15 @ CHECK: vcvt.f32.s32 q8, q8 @ encoding: [0x60,0x06,0xfb,0xf3]
16 vcvt.f32.s32 q8, q8
19 @ CHECK: vcvt.s32.f32 d16, d16, #1 @ encoding: [0x30,0x0f,0xff,0xf2]
20 vcvt.s32.f32 d16, d16, #1
[all …]
|
| D | neont2-cmp-encoding.s | 5 @ CHECK: vcvt.s32.f32 d16, d16 @ encoding: [0xfb,0xff,0x20,0x07]
6 vcvt.s32.f32 d16, d16
9 @ CHECK: vcvt.f32.s32 d16, d16 @ encoding: [0xfb,0xff,0x20,0x06]
10 vcvt.f32.s32 d16, d16
13 @ CHECK: vcvt.s32.f32 q8, q8 @ encoding: [0xfb,0xff,0x60,0x07]
14 vcvt.s32.f32 q8, q8
17 @ CHECK: vcvt.f32.s32 q8, q8 @ encoding: [0xfb,0xff,0x60,0x06]
18 vcvt.f32.s32 q8, q8
21 @ CHECK: vcvt.s32.f32 d16, d16, #1 @ encoding: [0xff,0xef,0x30,0x0f]
22 vcvt.s32.f32 d16, d16, #1
[all …]
|
| D | neont2-convert-encoding.s | 5 @ CHECK: vcvt.s32.f32 d16, d16 @ encoding: [0xfb,0xff,0x20,0x07]
6 vcvt.s32.f32 d16, d16
9 @ CHECK: vcvt.f32.s32 d16, d16 @ encoding: [0xfb,0xff,0x20,0x06]
10 vcvt.f32.s32 d16, d16
13 @ CHECK: vcvt.s32.f32 q8, q8 @ encoding: [0xfb,0xff,0x60,0x07]
14 vcvt.s32.f32 q8, q8
17 @ CHECK: vcvt.f32.s32 q8, q8 @ encoding: [0xfb,0xff,0x60,0x06]
18 vcvt.f32.s32 q8, q8
21 @ CHECK: vcvt.s32.f32 d16, d16, #1 @ encoding: [0xff,0xef,0x30,0x0f]
22 vcvt.s32.f32 d16, d16, #1
[all …]
|
| D | neon-v8.s | 12 vcvta.s32.f32 d4, d6
13 @ CHECK: vcvta.s32.f32 d4, d6 @ encoding: [0x06,0x40,0xbb,0xf3]
16 vcvta.s32.f32 q4, q6
17 @ CHECK: vcvta.s32.f32 q4, q6 @ encoding: [0x4c,0x80,0xbb,0xf3]
21 vcvtm.s32.f32 d1, d30
22 @ CHECK: vcvtm.s32.f32 d1, d30 @ encoding: [0x2e,0x13,0xbb,0xf3]
25 vcvtm.s32.f32 q1, q10
26 @ CHECK: vcvtm.s32.f32 q1, q10 @ encoding: [0x64,0x23,0xbb,0xf3]
30 vcvtn.s32.f32 d15, d17
31 @ CHECK: vcvtn.s32.f32 d15, d17 @ encoding: [0x21,0xf1,0xbb,0xf3]
[all …]
|
| D | thumb-neon-v8.s | 12 vcvta.s32.f32 d4, d6
13 @ CHECK: vcvta.s32.f32 d4, d6 @ encoding: [0xbb,0xff,0x06,0x40]
16 vcvta.s32.f32 q4, q6
17 @ CHECK: vcvta.s32.f32 q4, q6 @ encoding: [0xbb,0xff,0x4c,0x80]
21 vcvtm.s32.f32 d1, d30
22 @ CHECK: vcvtm.s32.f32 d1, d30 @ encoding: [0xbb,0xff,0x2e,0x13]
25 vcvtm.s32.f32 q1, q10
26 @ CHECK: vcvtm.s32.f32 q1, q10 @ encoding: [0xbb,0xff,0x64,0x23]
30 vcvtn.s32.f32 d15, d17
31 @ CHECK: vcvtn.s32.f32 d15, d17 @ encoding: [0xbb,0xff,0x21,0xf1]
[all …]
|
| D | neon-satshift-encoding.s | 7 @ CHECK: vqshl.s32 d16, d16, d17 @ encoding: [0xb0,0x04,0x61,0xf2]
8 vqshl.s32 d16, d16, d17
23 @ CHECK: vqshl.s32 q8, q8, q9 @ encoding: [0xf0,0x04,0x62,0xf2]
24 vqshl.s32 q8, q8, q9
39 @ CHECK: vqshl.s32 d16, d16, #31 @ encoding: [0x30,0x07,0xff,0xf2]
40 vqshl.s32 d16, d16, #31
55 @ CHECK: vqshlu.s32 d16, d16, #31 @ encoding: [0x30,0x06,0xff,0xf3]
56 vqshlu.s32 d16, d16, #31
63 @ CHECK: vqshl.s32 q8, q8, #31 @ encoding: [0x70,0x07,0xff,0xf2]
64 vqshl.s32 q8, q8, #31
[all …]
|
| D | neont2-satshift-encoding.s | 9 @ CHECK: vqshl.s32 d16, d16, d17 @ encoding: [0x61,0xef,0xb0,0x04]
10 vqshl.s32 d16, d16, d17
25 @ CHECK: vqshl.s32 q8, q8, q9 @ encoding: [0x62,0xef,0xf0,0x04]
26 vqshl.s32 q8, q8, q9
41 @ CHECK: vqshl.s32 d16, d16, #31 @ encoding: [0xff,0xef,0x30,0x07]
42 vqshl.s32 d16, d16, #31
57 @ CHECK: vqshlu.s32 d16, d16, #31 @ encoding: [0xff,0xff,0x30,0x06]
58 vqshlu.s32 d16, d16, #31
65 @ CHECK: vqshl.s32 q8, q8, #31 @ encoding: [0xff,0xef,0x70,0x07]
66 vqshl.s32 q8, q8, #31
[all …]
|
| D | basic-arm-instructions-v8.1a.s | 50 vqrdmlah.s32 d0, d1, d2
64 vqrdmlah.s32 q2, q3, q0
79 vqrdmlsh.s32 d0, d1, d2
93 vqrdmlsh.s32 q3, q4, q5
126 vqrdmlah.s32 d0, d1, d2[0]
140 vqrdmlah.s32 q0, q1, d2[0]
155 vqrdmlsh.s32 d0, d1, d2[0]
169 vqrdmlsh.s32 q0, q1, d2[0]
|
| D | neont2-neg-encoding.s | 9 @ CHECK: vneg.s32 d16, d16 @ encoding: [0xf9,0xff,0xa0,0x03]
10 vneg.s32 d16, d16
17 @ CHECK: vneg.s32 q8, q8 @ encoding: [0xf9,0xff,0xe0,0x03]
18 vneg.s32 q8, q8
25 @ CHECK: vqneg.s32 d16, d16 @ encoding: [0xf8,0xff,0xa0,0x07]
26 vqneg.s32 d16, d16
31 @ CHECK: vqneg.s32 q8, q8 @ encoding: [0xf8,0xff,0xe0,0x07]
32 vqneg.s32 q8, q8
|
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| D | neont2-cmp-encoding.s | 5 @ CHECK: vcvt.s32.f32 d16, d16 @ encoding: [0xfb,0xff,0x20,0x07]
6 vcvt.s32.f32 d16, d16
9 @ CHECK: vcvt.f32.s32 d16, d16 @ encoding: [0xfb,0xff,0x20,0x06]
10 vcvt.f32.s32 d16, d16
13 @ CHECK: vcvt.s32.f32 q8, q8 @ encoding: [0xfb,0xff,0x60,0x07]
14 vcvt.s32.f32 q8, q8
17 @ CHECK: vcvt.f32.s32 q8, q8 @ encoding: [0xfb,0xff,0x60,0x06]
18 vcvt.f32.s32 q8, q8
21 @ CHECK: vcvt.s32.f32 d16, d16, #1 @ encoding: [0xff,0xef,0x30,0x0f]
22 vcvt.s32.f32 d16, d16, #1
[all …]
|
| D | neon-convert-encoding.s | 3 @ CHECK: vcvt.s32.f32 d16, d16 @ encoding: [0x20,0x07,0xfb,0xf3]
4 vcvt.s32.f32 d16, d16
7 @ CHECK: vcvt.f32.s32 d16, d16 @ encoding: [0x20,0x06,0xfb,0xf3]
8 vcvt.f32.s32 d16, d16
11 @ CHECK: vcvt.s32.f32 q8, q8 @ encoding: [0x60,0x07,0xfb,0xf3]
12 vcvt.s32.f32 q8, q8
15 @ CHECK: vcvt.f32.s32 q8, q8 @ encoding: [0x60,0x06,0xfb,0xf3]
16 vcvt.f32.s32 q8, q8
19 @ CHECK: vcvt.s32.f32 d16, d16, #1 @ encoding: [0x30,0x0f,0xff,0xf2]
20 vcvt.s32.f32 d16, d16, #1
[all …]
|
| D | neont2-convert-encoding.s | 5 @ CHECK: vcvt.s32.f32 d16, d16 @ encoding: [0xfb,0xff,0x20,0x07]
6 vcvt.s32.f32 d16, d16
9 @ CHECK: vcvt.f32.s32 d16, d16 @ encoding: [0xfb,0xff,0x20,0x06]
10 vcvt.f32.s32 d16, d16
13 @ CHECK: vcvt.s32.f32 q8, q8 @ encoding: [0xfb,0xff,0x60,0x07]
14 vcvt.s32.f32 q8, q8
17 @ CHECK: vcvt.f32.s32 q8, q8 @ encoding: [0xfb,0xff,0x60,0x06]
18 vcvt.f32.s32 q8, q8
21 @ CHECK: vcvt.s32.f32 d16, d16, #1 @ encoding: [0xff,0xef,0x30,0x0f]
22 vcvt.s32.f32 d16, d16, #1
[all …]
|
| D | neont2-satshift-encoding.s | 9 @ CHECK: vqshl.s32 d16, d16, d17 @ encoding: [0x61,0xef,0xb0,0x04]
10 vqshl.s32 d16, d16, d17
25 @ CHECK: vqshl.s32 q8, q8, q9 @ encoding: [0x62,0xef,0xf0,0x04]
26 vqshl.s32 q8, q8, q9
41 @ CHECK: vqshl.s32 d16, d16, #31 @ encoding: [0xff,0xef,0x30,0x07]
42 vqshl.s32 d16, d16, #31
57 @ CHECK: vqshlu.s32 d16, d16, #31 @ encoding: [0xff,0xff,0x30,0x06]
58 vqshlu.s32 d16, d16, #31
65 @ CHECK: vqshl.s32 q8, q8, #31 @ encoding: [0xff,0xef,0x70,0x07]
66 vqshl.s32 q8, q8, #31
[all …]
|
| D | neon-satshift-encoding.s | 7 @ CHECK: vqshl.s32 d16, d16, d17 @ encoding: [0xb0,0x04,0x61,0xf2]
8 vqshl.s32 d16, d16, d17
23 @ CHECK: vqshl.s32 q8, q8, q9 @ encoding: [0xf0,0x04,0x62,0xf2]
24 vqshl.s32 q8, q8, q9
39 @ CHECK: vqshl.s32 d16, d16, #31 @ encoding: [0x30,0x07,0xff,0xf2]
40 vqshl.s32 d16, d16, #31
55 @ CHECK: vqshlu.s32 d16, d16, #31 @ encoding: [0x30,0x06,0xff,0xf3]
56 vqshlu.s32 d16, d16, #31
63 @ CHECK: vqshl.s32 q8, q8, #31 @ encoding: [0x70,0x07,0xff,0xf2]
64 vqshl.s32 q8, q8, #31
[all …]
|
| D | neont2-mul-encoding.s | 27 @ CHECK: vqdmulh.s32 d16, d16, d17 @ encoding: [0x60,0xef,0xa1,0x0b]
28 vqdmulh.s32 d16, d16, d17
31 @ CHECK: vqdmulh.s32 q8, q8, q9 @ encoding: [0x60,0xef,0xe2,0x0b]
32 vqdmulh.s32 q8, q8, q9
35 @ CHECK: vqrdmulh.s32 d16, d16, d17 @ encoding: [0x60,0xff,0xa1,0x0b]
36 vqrdmulh.s32 d16, d16, d17
39 @ CHECK: vqrdmulh.s32 q8, q8, q9 @ encoding: [0x60,0xff,0xe2,0x0b]
40 vqrdmulh.s32 q8, q8, q9
45 @ CHECK: vmull.s32 q8, d16, d17 @ encoding: [0xe0,0xef,0xa1,0x0c]
46 vmull.s32 q8, d16, d17
[all …]
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| /external/libavc/common/arm/ |
| D | ih264_ihadamard_scaling_a9.s | 104 vdup.s32 q10, r4 @ Populate the u4_qp_div_6 in Q10
108 vdup.s32 q9, r6 @ Populate pu2_iscal_mat[0]*pu2_weigh_mat[0] 32-bit in Q9
118 vadd.s32 q2, q12, q13 @pi4_tmp_ptr[0] = x0 + x1
119 vadd.s32 q3, q15, q14 @pi4_tmp_ptr[1] = x3 + x2
120 vsub.s32 q4, q12, q13 @pi4_tmp_ptr[2] = x0 - x1
121 vsub.s32 q5, q15, q14 @pi4_tmp_ptr[3] = x3 - x2
130 vadd.s32 q12, q2, q5 @x0 = x4+x7
131 vadd.s32 q13, q3, q4 @x1 = x5+x6
132 vsub.s32 q14, q3, q4 @x2 = x5-x6
133 vsub.s32 q15, q2, q5 @x3 = x4-x7
[all …]
|
| D | ih264_resi_trans_quant_a9.s | 172 vdup.s32 q4, r8 @Load rounding value row 1
178 vdup.s32 q10, r7 @Load qbit values
189 vmov.s32 q5, q4 @copy round fact for row 2
191 vmov.s32 q6, q4 @copy round fact for row 2
194 vmov.s32 q7, q4 @copy round fact for row 2
202 vshl.s32 q11, q4, q10 @Shift row 1
203 vshl.s32 q12, q5, q10 @Shift row 2
204 vshl.s32 q13, q6, q10 @Shift row 3
205 vshl.s32 q14, q7, q10 @Shift row 4
207 vmovn.s32 d30, q11 @Narrow row 1
[all …]
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| D | ih264_iquant_itrans_recon_a9.s | 125 vdup.s32 q15, r7 @Populate the u4_qp_div_6 in Q15
152 vshl.s32 q0, q0, q15 @ Q0 = q[i] = (p[i] << (qP/6)) where i = 0..3
153 vshl.s32 q1, q1, q15 @ Q1 = q[i] = (p[i] << (qP/6)) where i = 4..7
154 vshl.s32 q2, q2, q15 @ Q2 = q[i] = (p[i] << (qP/6)) where i = 8..11
155 vshl.s32 q3, q3, q15 @ Q3 = q[i] = (p[i] << (qP/6)) where i = 12..15
157 vqrshrn.s32 d0, q0, #0x4 @ D0 = c[i] = ((q[i] + 32) >> 4) where i = 0..3
158 vqrshrn.s32 d1, q1, #0x4 @ D1 = c[i] = ((q[i] + 32) >> 4) where i = 4..7
159 vqrshrn.s32 d2, q2, #0x4 @ D2 = c[i] = ((q[i] + 32) >> 4) where i = 8..11
160 vqrshrn.s32 d3, q3, #0x4 @ D3 = c[i] = ((q[i] + 32) >> 4) where i = 12..15
305 vdup.s32 q15, r7 @Populate the u4_qp_div_6 in Q15
[all …]
|
| /external/libjpeg-turbo/simd/ |
| D | jsimd_arm_neon.S | 283 vshl.s32 q3, q3, #13
287 vadd.s32 q1, q3, q2
290 vadd.s32 q1, q1, q6
295 vrshrn.s32 ROW1L, q1, #11
297 vsub.s32 q1, q1, q6
302 vsub.s32 q1, q1, q6
306 vsub.s32 q3, q3, q2
308 vrshrn.s32 ROW6L, q1, #11
310 vadd.s32 q1, q3, q5
312 vsub.s32 q3, q3, q5
[all …]
|