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Searched refs:s_add_u32 (Results 1 – 19 of 19) sorted by relevance

/external/llvm/test/CodeGen/AMDGPU/
Dglobal-variable-relocs.ll17 ; CHECK: s_add_u32 s[[ADDR_LO:[0-9]+]], s[[PC_LO]], private+8
31 ; CHECK: s_add_u32 s[[ADDR_LO:[0-9]+]], s[[PC_LO]], internal+8
45 ; CHECK: s_add_u32 s[[GOTADDR_LO:[0-9]+]], s[[PC_LO]], available_externally@GOTPCREL+4
48 ; CHECK: s_add_u32 s[[GEP_LO:[0-9]+]], s[[ADDR_LO]], 4
62 ; CHECK: s_add_u32 s[[GOTADDR_LO:[0-9]+]], s[[PC_LO]], linkonce@GOTPCREL+4
65 ; CHECK: s_add_u32 s[[GEP_LO:[0-9]+]], s[[ADDR_LO]], 4
79 ; CHECK: s_add_u32 s[[GOTADDR_LO:[0-9]+]], s[[PC_LO]], weak@GOTPCREL+4
82 ; CHECK: s_add_u32 s[[GEP_LO:[0-9]+]], s[[ADDR_LO]], 4
96 ; CHECK: s_add_u32 s[[GOTADDR_LO:[0-9]+]], s[[PC_LO]], common@GOTPCREL+4
99 ; CHECK: s_add_u32 s[[GEP_LO:[0-9]+]], s[[ADDR_LO]], 4
[all …]
Dglobal-constant.ll9 ; GCN-NEXT: s_add_u32 s{{[0-9]+}}, s[[PC0_LO]], readonly
12 ; GCN-NEXT: s_add_u32 s{{[0-9]+}}, s[[PC1_LO]], readonly
Dadd_i64.ll46 ; SI: s_add_u32
48 ; SI: s_add_u32
Dsplit-scalar-i64-add.ll24 ; SI: s_add_u32 {{s[0-9]+}}, {{s[0-9]+}}, 0x18f
49 ; SI: s_add_u32 {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}
Dadd.ll123 ; SI: s_add_u32
163 ; SI: s_add_u32
Duaddo.ll56 ; SI: s_add_u32
Dtrunc.ll37 ; SI: s_add_u32 s[[LO_SREG2:[0-9]+]], s[[LO_SHL]],
Doperand-folding.ll43 ; CHECK-DAG: s_add_u32 [[LO:s[0-9]+]], s{{[0-9]+}}, 1
Dsra.ll206 ; GCN: s_add_u32 s{{[0-9]+}}, s[[HI]], s{{[0-9]+}}
233 ; GCN: s_add_u32 {{s[0-9]+}}, s[[SHIFT]], {{s[0-9]+}}
Dcgp-addressing-modes.ll326 ; GCN: s_add_u32 s{{[0-9]+}}, s{{[0-9]+}}, -4{{$}}
357 ; GCN: s_add_u32
Daddrspacecast.ll230 ; HSA-DAG: s_add_u32 [[ADD:s[0-9]+]], s8, s11
Dand.ll346 ; SI: s_add_u32
Damdgpu.private-memory.ll46 ; HSA-ALLOCA: s_add_u32 s6, s6, s9
/external/llvm/test/MC/AMDGPU/
Dtrap.s9 s_add_u32 ttmp0, ttmp0, 4 label
13 s_add_u32 ttmp4, 8, ttmp4 label
17 s_add_u32 ttmp4, ttmp4, 0x00000100 label
21 s_add_u32 ttmp4, ttmp4, 4 label
25 s_add_u32 ttmp4, ttmp8, ttmp4 label
Dsop2.s7 s_add_u32 s1, s2, s3 label
167 s_add_u32 s101, s102, s103 label
Dexpressions.s28 s_add_u32 s0, s0, global+4 label
/external/llvm/test/MC/Disassembler/AMDGPU/
Dtrap_vi.txt7 # VI: s_add_u32 ttmp0, ttmp0, 4 ; encoding: [0x70,0x84,0x70,0x80]
10 # VI: s_add_u32 ttmp4, 8, ttmp4 ; encoding: [0x88,0x74,0x74,0x80]
13 # VI: s_add_u32 ttmp4, ttmp4, 0x100 ; encoding: [0x74,0xff,0x74,0x80,0x00,0x01,0x00,0x00]
16 # VI: s_add_u32 ttmp4, ttmp4, 4 ; encoding: [0x74,0x84,0x74,0x80]
19 # VI: s_add_u32 ttmp4, ttmp8, ttmp4 ; encoding: [0x78,0x74,0x74,0x80]
/external/llvm/test/Object/AMDGPU/
Dobjdump.s13 s_add_u32 s0, s7, s0
/external/llvm/lib/Target/AMDGPU/
DSIInstructions.td197 defm S_ADD_U32 : SOP2_32 <sop2<0x00>, "s_add_u32", []>;