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Searched refs:schedule_node (Results 1 – 3 of 3) sorted by relevance

/external/mesa3d/src/gallium/drivers/vc4/
Dvc4_qir_schedule.c43 struct schedule_node { struct
47 struct schedule_node **children; argument
92 struct schedule_node *before, in add_dep()
93 struct schedule_node *after) in add_dep()
101 struct schedule_node *t = before; in add_dep()
114 struct schedule_node *, in add_dep()
125 struct schedule_node **before, in add_write_dep()
126 struct schedule_node *after) in add_write_dep()
133 struct schedule_node **last_temp_write;
134 struct schedule_node *last_sf;
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Dvc4_qpu_schedule.c45 struct schedule_node { struct
77 struct schedule_node *node; argument
87 struct schedule_node *last_r[6];
88 struct schedule_node *last_ra[32];
89 struct schedule_node *last_rb[32];
90 struct schedule_node *last_sf;
91 struct schedule_node *last_vpm_read;
92 struct schedule_node *last_tmu_write;
93 struct schedule_node *last_tlb;
94 struct schedule_node *last_vpm;
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/external/mesa3d/src/mesa/drivers/dri/i965/
Dbrw_schedule_instructions.cpp62 class schedule_node : public exec_node class
65 schedule_node(backend_instruction *inst, instruction_scheduler *sched);
70 schedule_node **children;
96 schedule_node *exit;
114 exit_unblocked_time(const schedule_node *n) in exit_unblocked_time()
120 schedule_node::set_latency_gen4() in set_latency_gen4()
158 schedule_node::set_latency_gen7(bool is_haswell) in set_latency_gen7()
483 void add_barrier_deps(schedule_node *n);
484 void add_dep(schedule_node *before, schedule_node *after, int latency);
485 void add_dep(schedule_node *before, schedule_node *after);
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