/external/llvm/lib/CodeGen/GlobalISel/ |
D | MachineIRBuilder.cpp | 31 void MachineIRBuilder::setMBB(MachineBasicBlock &MBB, bool Beginning) { in setMBB() function in MachineIRBuilder 40 setMBB(*MI.getParent()); in setInstr()
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D | IRTranslator.cpp | 136 MIRBuilder.setMBB(MBB); in runOnMachineFunction() 149 MIRBuilder.setMBB(MBB); in runOnMachineFunction()
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D | RegBankSelect.cpp | 552 MIRBuilder.setMBB(*MBB); in runOnMachineFunction()
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/external/llvm/include/llvm/CodeGen/GlobalISel/ |
D | MachineIRBuilder.h | 77 void setMBB(MachineBasicBlock &MBB, bool Beginning = false);
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/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
D | MachineOperand.h | 442 void setMBB(MachineBasicBlock *MBB) { in setMBB() function 512 Op.setMBB(MBB);
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/external/swiftshader/third_party/LLVM/lib/CodeGen/ |
D | MachineBasicBlock.cpp | 443 MO.setMBB(this); in transferSuccessorsAndUpdatePHIs() 572 i->getOperand(ni+1).setMBB(NMBB); in SplitCriticalEdge() 686 I->getOperand(i).setMBB(New); in ReplaceUsesOfBlockWith()
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D | TailDuplication.cpp | 496 II->getOperand(Idx+1).setMBB(SrcBB); in UpdateSuccessorsPHIs() 509 II->getOperand(Idx+1).setMBB(SrcBB); in UpdateSuccessorsPHIs()
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D | TargetInstrInfoImpl.cpp | 156 MO.setMBB(Pred[j].getMBB()); in PredicateInstruction()
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/external/llvm/lib/Target/AArch64/ |
D | AArch64BranchRelaxation.cpp | 398 BMI->getOperand(0).setMBB(DestBB); in fixupConditionalBranch() 405 MI->getOperand(OpNum).setMBB(NewDest); in fixupConditionalBranch()
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonCFGOptimizer.cpp | 98 MI.getOperand(1).setMBB(NewTarget); in InvertAndChangeJumpTarget()
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D | HexagonEarlyIfConv.cpp | 984 MO->setMBB(NewB); in replacePhiEdges()
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D | HexagonInstrInfo.cpp | 607 Loop->getOperand(0).setMBB(TBB); in InsertBranch() 647 Loop->getOperand(0).setMBB(TBB); in InsertBranch() 4238 MI->getOperand(TargetPos).setMBB(NewTarget); in invertAndChangeJumpTarget()
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D | HexagonHardwareLoops.cpp | 1916 MO.setMBB(NewPH); in createPreheaderForLoop()
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/external/llvm/include/llvm/CodeGen/ |
D | MachineOperand.h | 532 void setMBB(MachineBasicBlock *MBB) { in setMBB() function 634 Op.setMBB(MBB);
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/external/llvm/lib/Target/WebAssembly/ |
D | WebAssemblyFixIrreducibleControlFlow.cpp | 253 Op.setMBB(Map[Op.getMBB()]); in VisitLoop()
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/external/llvm/lib/CodeGen/ |
D | MachineBasicBlock.cpp | 657 MO.setMBB(this); in transferSuccessorsAndUpdatePHIs() 835 i->getOperand(ni+1).setMBB(NMBB); in SplitCriticalEdge() 1060 I->getOperand(i).setMBB(New); in ReplaceUsesOfBlockWith()
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D | TailDuplicator.cpp | 478 II->getOperand(Idx + 1).setMBB(SrcBB); in updateSuccessorsPHIs() 490 II->getOperand(Idx + 1).setMBB(SrcBB); in updateSuccessorsPHIs()
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D | EarlyIfConversion.cpp | 501 PI.PHI->getOperand(i-1).setMBB(Head); in rewritePHIOperands()
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D | TargetInstrInfo.cpp | 297 MO.setMBB(Pred[j].getMBB()); in PredicateInstruction()
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D | MachinePipeliner.cpp | 2422 MO.setMBB(PredBB); in generateEpilog()
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/external/llvm/lib/Target/Mips/ |
D | MipsConstantIslandPass.cpp | 1613 BMI->getOperand(BMITargetOperand).setMBB(DestBB); in fixupConditionalBr() 1614 MI->getOperand(TargetOperand).setMBB(NewDest); in fixupConditionalBr()
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | ARMConstantIslandPass.cpp | 1492 BMI->getOperand(0).setMBB(DestBB); in FixUpConditionalBr() 1493 MI->getOperand(0).setMBB(NewDest); in FixUpConditionalBr()
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/external/llvm/lib/Target/ARM/ |
D | ARMConstantIslandPass.cpp | 1753 BMI->getOperand(0).setMBB(DestBB); in fixupConditionalBr() 1754 MI->getOperand(0).setMBB(NewDest); in fixupConditionalBr()
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/external/llvm/lib/Target/AMDGPU/ |
D | AMDILCFGStructurizer.cpp | 557 MI->getOperand(0).setMBB(MBB); in setTrueBranch()
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D | SIISelLowering.cpp | 1112 FromBB.setMBB(SplitBB); in splitKillBlock()
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