Searched refs:setend (Results 1 – 18 of 18) sorted by relevance
/external/llvm/test/MC/ARM/ |
D | thumb-not-mclass.s | 22 setend be 23 setend le
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D | basic-thumb-instructions.s | 510 setend be 511 setend le 513 @ CHECK: setend be @ encoding: [0x58,0xb6] 514 @ CHECK: setend le @ encoding: [0x50,0xb6]
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D | deprecated-v8.s | 6 setend be label
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D | diagnostics.s | 220 setend me 221 setend 1 227 @ CHECK-ERRORS: setend me 230 @ CHECK-ERRORS: setend 1
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D | basic-arm-instructions.s | 2303 setend be 2304 setend BE 2305 setend le 2306 setend LE 2308 @ CHECK: setend be @ encoding: [0x00,0x02,0x01,0xf1] 2309 @ CHECK: setend be @ encoding: [0x00,0x02,0x01,0xf1] 2310 @ CHECK: setend le @ encoding: [0x00,0x00,0x01,0xf1] 2311 @ CHECK: setend le @ encoding: [0x00,0x00,0x01,0xf1]
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/external/swiftshader/third_party/LLVM/test/MC/ARM/ |
D | diagnostics.s | 151 setend me 152 setend 1 158 @ CHECK-ERRORS: setend me 161 @ CHECK-ERRORS: setend 1
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D | basic-thumb-instructions.s | 459 setend be 460 setend le 462 @ CHECK: setend be @ encoding: [0x58,0xb6] 463 @ CHECK: setend le @ encoding: [0x50,0xb6]
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D | basic-arm-instructions.s | 1525 setend be 1526 setend le 1528 @ CHECK: setend be @ encoding: [0x00,0x02,0x01,0xf1] 1529 @ CHECK: setend le @ encoding: [0x00,0x00,0x01,0xf1]
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/external/llvm/test/MC/Disassembler/ARM/ |
D | thumb1.txt | 379 # CHECK: setend be 380 # CHECK: setend le
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D | arm-tests.txt | 173 # CHECK: setend be 176 # CHECK: setend le
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D | basic-arm-instructions.txt | 1517 # CHECK: setend be 1518 # CHECK: setend le
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/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
D | thumb1.txt | 370 # CHECK: setend be 371 # CHECK: setend le
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D | arm-tests.txt | 149 # CHECK: setend be 152 # CHECK: setend le
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D | basic-arm-instructions.txt | 1356 # CHECK: setend be 1357 # CHECK: setend le
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | ARMInstrThumb.td | 277 def tSETEND : T1I<(outs), (ins setend_op:$end), NoItinerary, "setend\t$end",
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D | ARMInstrInfo.td | 1713 "setend\t$end", []>, Requires<[IsARM]> {
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/external/llvm/lib/Target/ARM/ |
D | ARMInstrThumb.td | 331 def tSETEND : T1I<(outs), (ins setend_op:$end), NoItinerary, "setend\t$end",
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D | ARMInstrInfo.td | 2032 "setend\t$end", []>, Requires<[IsARM]>, Deprecated<HasV8Ops> {
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