| /external/llvm/test/MC/Disassembler/ARM/ |
| D | unpredictable-SHADD16-arm.txt | 4 # CHECK: shadd16 r5, r7, r0
|
| D | basic-arm-instructions.txt | 1535 # CHECK: shadd16 r4, r8, r2
|
| /external/valgrind/none/tests/arm/ |
| D | v6media.stdout.exp | 4045 shadd16 r0, r1, r2 :: rd 0x00100001 rm 0x0009ffff, rn 0x00180003, carryin 0, cpsr 0x00000000 …
4046 shadd16 r0, r1, r2 :: rd 0x00100001 rm 0x00180003, rn 0x0009ffff, carryin 0, cpsr 0x00000000 …
4047 shadd16 r0, r1, r2 :: rd 0x00010010 rm 0x00030018, rn 0xffff0009, carryin 0, cpsr 0x00000000 …
4048 shadd16 r0, r1, r2 :: rd 0x00010010 rm 0xffff0009, rn 0x00030018, carryin 0, cpsr 0x00000000 …
4049 shadd16 r0, r1, r2 :: rd 0x3fff3fff rm 0x7fff7fff, rn 0x00000000, carryin 0, cpsr 0x00000000 …
4050 shadd16 r0, r1, r2 :: rd 0x00004000 rm 0x7fff00ff, rn 0x80017f01, carryin 0, cpsr 0x00000000 …
4051 shadd16 r0, r1, r2 :: rd 0xc000c000 rm 0x80008000, rn 0x00000000, carryin 0, cpsr 0x00000000 …
4052 shadd16 r0, r1, r2 :: rd 0xbfffbfff rm 0x80008000, rn 0xffffffff, carryin 0, cpsr 0x00000000 …
4053 shadd16 r0, r1, r2 :: rd 0xc3071ea4 rm 0xb8035b5b, rn 0xce0ce1ed, carryin 0, cpsr 0x00000000 …
4054 shadd16 r0, r1, r2 :: rd 0xdfa25c8b rm 0x146275d8, rn 0xaae3433f, carryin 0, cpsr 0x00000000 …
[all …]
|
| /external/vixl/test/aarch32/ |
| D | test-assembler-cond-rd-rn-rm-t32.cc | 60 M(shadd16) \
|
| D | test-assembler-cond-rd-rn-rm-a32.cc | 61 M(shadd16) \
|
| /external/valgrind/docs/internals/ |
| D | 3_8_BUGSTATUS.txt | 45 (304035: ARM: uqsub16 shadd16 uhsub8 uhsub16)
|
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| D | basic-arm-instructions.s | 1545 shadd16 r4, r8, r2
1550 @ CHECK: shadd16 r4, r8, r2 @ encoding: [0x12,0x4f,0x38,0xe6]
|
| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 2950 void shadd16(Condition cond, Register rd, Register rn, Register rm);
2951 void shadd16(Register rd, Register rn, Register rm) { in shadd16() function
2952 shadd16(al, rd, rn, rm); in shadd16()
|
| D | disasm-aarch32.h | 947 void shadd16(Condition cond, Register rd, Register rn, Register rm);
|
| D | assembler-aarch32.cc | 8872 void Assembler::shadd16(Condition cond, Register rd, Register rn, Register rm) { in shadd16() function in vixl::aarch32::Assembler
8889 Delegate(kShadd16, &Assembler::shadd16, cond, rd, rn, rm); in shadd16()
|
| D | disasm-aarch32.cc | 2472 void Disassembler::shadd16(Condition cond, in shadd16() function in vixl::aarch32::Disassembler
21460 shadd16(CurrentCond(), in DecodeT32()
62999 shadd16(condition, in DecodeA32()
|
| D | macro-assembler-aarch32.h | 3526 shadd16(cond, rd, rn, rm); in Shadd16()
|
| /external/llvm/test/MC/ARM/ |
| D | basic-arm-instructions.s | 2327 shadd16 r4, r8, r2
2332 @ CHECK: shadd16 r4, r8, r2 @ encoding: [0x12,0x4f,0x38,0xe6]
|
| /external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
| D | basic-arm-instructions.txt | 1374 # CHECK: shadd16 r4, r8, r2
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 1971 def t2SHADD16 : T2I_pam<0b001, 0b0010, "shadd16">;
|
| D | ARMInstrInfo.td | 3204 def SHADD16 : AAI<0b01100011, 0b11110001, "shadd16">;
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 2176 def t2SHADD16 : T2I_pam<0b001, 0b0010, "shadd16">;
|
| D | ARMInstrInfo.td | 3605 def SHADD16 : AAI<0b01100011, 0b11110001, "shadd16">;
|