| /external/libopus/m4/ |
| D | as-gcc-inline-assembly.m4 | 60 AC_COMPILE_IFELSE([AC_LANG_PROGRAM([],[__asm__("shadd8 r3,r3,r3")])],
|
| /external/valgrind/none/tests/arm/ |
| D | v6media.stdout.exp | 2491 shadd8 r0, r1, r2 :: rd 0x0010ff01 rm 0x0009ffff, rn 0x00180003, carryin 0, cpsr 0x00000000 g…
2492 shadd8 r0, r1, r2 :: rd 0x0010ff01 rm 0x00180003, rn 0x0009ffff, carryin 0, cpsr 0x00000000 g…
2493 shadd8 r0, r1, r2 :: rd 0xff010010 rm 0x00030018, rn 0xffff0009, carryin 0, cpsr 0x00000000 g…
2494 shadd8 r0, r1, r2 :: rd 0xff010010 rm 0xffff0009, rn 0x00030018, carryin 0, cpsr 0x00000000 g…
2495 shadd8 r0, r1, r2 :: rd 0x3fff3fff rm 0x7fff7fff, rn 0x00000000, carryin 0, cpsr 0x00000000 g…
2496 shadd8 r0, r1, r2 :: rd 0xff003f00 rm 0x7fff00ff, rn 0x80017f01, carryin 0, cpsr 0x00000000 g…
2497 shadd8 r0, r1, r2 :: rd 0xc000c000 rm 0x80008000, rn 0x00000000, carryin 0, cpsr 0x00000000 g…
2498 shadd8 r0, r1, r2 :: rd 0xbfffbfff rm 0x80008000, rn 0xffffffff, carryin 0, cpsr 0x00000000 g…
2499 shadd8 r0, r1, r2 :: rd 0xc3071e24 rm 0xb8035b5b, rn 0xce0ce1ed, carryin 0, cpsr 0x00000000 g…
2500 shadd8 r0, r1, r2 :: rd 0xdf225c0b rm 0x146275d8, rn 0xaae3433f, carryin 0, cpsr 0x00000000 g…
[all …]
|
| /external/vixl/test/aarch32/ |
| D | test-assembler-cond-rd-rn-rm-t32.cc | 61 M(shadd8) \
|
| D | test-assembler-cond-rd-rn-rm-a32.cc | 62 M(shadd8) \
|
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| D | basic-arm-instructions.s | 1547 shadd8 r4, r8, r2
1552 @ CHECK: shadd8 r4, r8, r2 @ encoding: [0x92,0x4f,0x38,0xe6]
|
| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 2955 void shadd8(Condition cond, Register rd, Register rn, Register rm);
2956 void shadd8(Register rd, Register rn, Register rm) { shadd8(al, rd, rn, rm); } in shadd8() function
|
| D | disasm-aarch32.h | 949 void shadd8(Condition cond, Register rd, Register rn, Register rm);
|
| D | assembler-aarch32.cc | 8892 void Assembler::shadd8(Condition cond, Register rd, Register rn, Register rm) { in shadd8() function in vixl::aarch32::Assembler
8909 Delegate(kShadd8, &Assembler::shadd8, cond, rd, rn, rm); in shadd8()
|
| D | disasm-aarch32.cc | 2485 void Disassembler::shadd8(Condition cond, in shadd8() function in vixl::aarch32::Disassembler
21067 shadd8(CurrentCond(), in DecodeT32()
63019 shadd8(condition, Register(rd), Register(rn), Register(rm)); in DecodeA32()
|
| D | macro-assembler-aarch32.h | 3540 shadd8(cond, rd, rn, rm); in Shadd8()
|
| /external/llvm/test/MC/ARM/ |
| D | basic-arm-instructions.s | 2329 shadd8 r4, r8, r2
2334 @ CHECK: shadd8 r4, r8, r2 @ encoding: [0x92,0x4f,0x38,0xe6]
|
| /external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
| D | basic-arm-instructions.txt | 1376 # CHECK: shadd8 r4, r8, r2
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | basic-arm-instructions.txt | 1537 # CHECK: shadd8 r4, r8, r2
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 1972 def t2SHADD8 : T2I_pam<0b000, 0b0010, "shadd8">;
|
| D | ARMInstrInfo.td | 3205 def SHADD8 : AAI<0b01100011, 0b11111001, "shadd8">;
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 2177 def t2SHADD8 : T2I_pam<0b000, 0b0010, "shadd8">;
|
| D | ARMInstrInfo.td | 3606 def SHADD8 : AAI<0b01100011, 0b11111001, "shadd8">;
|