| /external/valgrind/none/tests/arm/ |
| D | v6media.stdout.exp | 4465 shsub16 r0, r1, r2 :: rd 0xfff8fffe rm 0x0009ffff, rn 0x00180003, carryin 0, cpsr 0x00000000 …
4466 shsub16 r0, r1, r2 :: rd 0x00070002 rm 0x00180003, rn 0x0009ffff, carryin 0, cpsr 0x00000000 …
4467 shsub16 r0, r1, r2 :: rd 0x00020007 rm 0x00030018, rn 0xffff0009, carryin 0, cpsr 0x00000000 …
4468 shsub16 r0, r1, r2 :: rd 0xfffefff8 rm 0xffff0009, rn 0x00030018, carryin 0, cpsr 0x00000000 …
4469 shsub16 r0, r1, r2 :: rd 0x3fff3fff rm 0x7fff7fff, rn 0x00000000, carryin 0, cpsr 0x00000000 …
4470 shsub16 r0, r1, r2 :: rd 0x7fffc0ff rm 0x7fff00ff, rn 0x80017f01, carryin 0, cpsr 0x00000000 …
4471 shsub16 r0, r1, r2 :: rd 0xc000c000 rm 0x80008000, rn 0x00000000, carryin 0, cpsr 0x00000000 …
4472 shsub16 r0, r1, r2 :: rd 0xc000c000 rm 0x80008000, rn 0xffffffff, carryin 0, cpsr 0x00000000 …
4473 shsub16 r0, r1, r2 :: rd 0xf4fb3cb7 rm 0xb8035b5b, rn 0xce0ce1ed, carryin 0, cpsr 0x00000000 …
4474 shsub16 r0, r1, r2 :: rd 0x34bf194c rm 0x146275d8, rn 0xaae3433f, carryin 0, cpsr 0x00000000 …
[all …]
|
| /external/vixl/test/aarch32/ |
| D | test-assembler-cond-rd-rn-rm-t32.cc | 64 M(shsub16) \
|
| D | test-assembler-cond-rd-rn-rm-a32.cc | 65 M(shsub16) \
|
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| D | basic-arm-instructions.s | 1569 shsub16 r4, r8, r2
1574 @ CHECK: shsub16 r4, r8, r2 @ encoding: [0x72,0x4f,0x38,0xe6]
|
| D | basic-thumb2-instructions.s | 1812 shsub16 r4, r8, r2
1818 @ CHECK: shsub16 r4, r8, r2 @ encoding: [0xd8,0xfa,0x22,0xf4]
|
| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 2964 void shsub16(Condition cond, Register rd, Register rn, Register rm);
2965 void shsub16(Register rd, Register rn, Register rm) { in shsub16() function
2966 shsub16(al, rd, rn, rm); in shsub16()
|
| D | disasm-aarch32.h | 955 void shsub16(Condition cond, Register rd, Register rn, Register rm);
|
| D | assembler-aarch32.cc | 8952 void Assembler::shsub16(Condition cond, Register rd, Register rn, Register rm) { in shsub16() function in vixl::aarch32::Assembler
8969 Delegate(kShsub16, &Assembler::shsub16, cond, rd, rn, rm); in shsub16()
|
| D | disasm-aarch32.cc | 2524 void Disassembler::shsub16(Condition cond, in shsub16() function in vixl::aarch32::Disassembler
21622 shsub16(CurrentCond(), in DecodeT32()
63162 shsub16(condition, in DecodeA32()
|
| D | macro-assembler-aarch32.h | 3576 shsub16(cond, rd, rn, rm); in Shsub16()
|
| /external/llvm/test/MC/ARM/ |
| D | basic-thumb2-instructions.s | 2247 shsub16 r4, r8, r2
2253 @ CHECK: shsub16 r4, r8, r2 @ encoding: [0xd8,0xfa,0x22,0xf4]
|
| D | basic-arm-instructions.s | 2351 shsub16 r4, r8, r2
2356 @ CHECK: shsub16 r4, r8, r2 @ encoding: [0x72,0x4f,0x38,0xe6]
|
| /external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
| D | basic-arm-instructions.txt | 1398 # CHECK: shsub16 r4, r8, r2
|
| D | thumb2.txt | 1592 # CHECK: shsub16 r4, r8, r2
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | thumb2.txt | 1731 # CHECK: shsub16 r4, r8, r2
|
| D | basic-arm-instructions.txt | 1559 # CHECK: shsub16 r4, r8, r2
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 1974 def t2SHSUB16 : T2I_pam<0b101, 0b0010, "shsub16">;
|
| D | ARMInstrInfo.td | 3207 def SHSUB16 : AAI<0b01100011, 0b11110111, "shsub16">;
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 2179 def t2SHSUB16 : T2I_pam<0b101, 0b0010, "shsub16">;
|
| D | ARMInstrInfo.td | 3608 def SHSUB16 : AAI<0b01100011, 0b11110111, "shsub16">;
|