/external/valgrind/none/tests/arm/ |
D | v6media.stdout.exp | 2551 shsub8 r0, r1, r2 :: rd 0x00f8fffe rm 0x0009ffff, rn 0x00180003, carryin 0, cpsr 0x00000000 g… 2552 shsub8 r0, r1, r2 :: rd 0x00070002 rm 0x00180003, rn 0x0009ffff, carryin 0, cpsr 0x00000000 g… 2553 shsub8 r0, r1, r2 :: rd 0x00020007 rm 0x00030018, rn 0xffff0009, carryin 0, cpsr 0x00000000 g… 2554 shsub8 r0, r1, r2 :: rd 0xfffe00f8 rm 0xffff0009, rn 0x00030018, carryin 0, cpsr 0x00000000 g… 2555 shsub8 r0, r1, r2 :: rd 0x3fff3fff rm 0x7fff7fff, rn 0x00000000, carryin 0, cpsr 0x00000000 g… 2556 shsub8 r0, r1, r2 :: rd 0x7fffc0ff rm 0x7fff00ff, rn 0x80017f01, carryin 0, cpsr 0x00000000 g… 2557 shsub8 r0, r1, r2 :: rd 0xc000c000 rm 0x80008000, rn 0x00000000, carryin 0, cpsr 0x00000000 g… 2558 shsub8 r0, r1, r2 :: rd 0xc000c000 rm 0x80008000, rn 0xffffffff, carryin 0, cpsr 0x00000000 g… 2559 shsub8 r0, r1, r2 :: rd 0xf5fb3d37 rm 0xb8035b5b, rn 0xce0ce1ed, carryin 0, cpsr 0x00000000 g… 2560 shsub8 r0, r1, r2 :: rd 0x353f19cc rm 0x146275d8, rn 0xaae3433f, carryin 0, cpsr 0x00000000 g… [all …]
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/external/vixl/test/aarch32/ |
D | test-assembler-cond-rd-rn-rm-t32.cc | 65 M(shsub8) \
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D | test-assembler-cond-rd-rn-rm-a32.cc | 66 M(shsub8) \
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/external/swiftshader/third_party/LLVM/test/MC/ARM/ |
D | basic-arm-instructions.s | 1571 shsub8 r4, r8, r2 1576 @ CHECK: shsub8 r4, r8, r2 @ encoding: [0xf2,0x4f,0x38,0xe6]
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D | basic-thumb2-instructions.s | 1813 shsub8 r4, r8, r2 1819 @ CHECK: shsub8 r4, r8, r2 @ encoding: [0xc8,0xfa,0x22,0xf4]
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/external/vixl/src/aarch32/ |
D | assembler-aarch32.h | 2969 void shsub8(Condition cond, Register rd, Register rn, Register rm); 2970 void shsub8(Register rd, Register rn, Register rm) { shsub8(al, rd, rn, rm); } in shsub8() function
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D | disasm-aarch32.h | 957 void shsub8(Condition cond, Register rd, Register rn, Register rm);
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D | assembler-aarch32.cc | 8972 void Assembler::shsub8(Condition cond, Register rd, Register rn, Register rm) { in shsub8() function in vixl::aarch32::Assembler 8989 Delegate(kShsub8, &Assembler::shsub8, cond, rd, rn, rm); in shsub8()
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D | disasm-aarch32.cc | 2537 void Disassembler::shsub8(Condition cond, in shsub8() function in vixl::aarch32::Disassembler 21271 shsub8(CurrentCond(), in DecodeT32() 63182 shsub8(condition, Register(rd), Register(rn), Register(rm)); in DecodeA32()
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D | macro-assembler-aarch32.h | 3590 shsub8(cond, rd, rn, rm); in Shsub8()
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/external/llvm/test/MC/ARM/ |
D | basic-thumb2-instructions.s | 2248 shsub8 r4, r8, r2 2254 @ CHECK: shsub8 r4, r8, r2 @ encoding: [0xc8,0xfa,0x22,0xf4]
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D | basic-arm-instructions.s | 2353 shsub8 r4, r8, r2 2358 @ CHECK: shsub8 r4, r8, r2 @ encoding: [0xf2,0x4f,0x38,0xe6]
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/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
D | basic-arm-instructions.txt | 1400 # CHECK: shsub8 r4, r8, r2
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D | thumb2.txt | 1593 # CHECK: shsub8 r4, r8, r2
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/external/llvm/test/MC/Disassembler/ARM/ |
D | thumb2.txt | 1732 # CHECK: shsub8 r4, r8, r2
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D | basic-arm-instructions.txt | 1561 # CHECK: shsub8 r4, r8, r2
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | ARMInstrThumb2.td | 1975 def t2SHSUB8 : T2I_pam<0b100, 0b0010, "shsub8">;
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D | ARMInstrInfo.td | 3208 def SHSUB8 : AAI<0b01100011, 0b11111111, "shsub8">;
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/external/llvm/lib/Target/ARM/ |
D | ARMInstrThumb2.td | 2180 def t2SHSUB8 : T2I_pam<0b100, 0b0010, "shsub8">;
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D | ARMInstrInfo.td | 3609 def SHSUB8 : AAI<0b01100011, 0b11111111, "shsub8">;
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