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Searched refs:shuf (Results 1 – 25 of 43) sorted by relevance

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/external/llvm/test/Analysis/CostModel/X86/
Dreduction.ll7 …%rdx.shuf = shufflevector <4 x float> %rdx, <4 x float> undef, <4 x i32> <i32 2, i32 3, i32 undef,…
8 %bin.rdx = fadd <4 x float> %rdx, %rdx.shuf
22 %rdx.shuf = shufflevector <8 x i32> %rdx, <8 x i32> undef,
25 %bin.rdx = add <8 x i32> %rdx, %rdx.shuf
26 %rdx.shuf.2 = shufflevector <8 x i32> %bin.rdx, <8 x i32> undef,
29 %bin.rdx.2 = add <8 x i32> %bin.rdx, %rdx.shuf.2
30 %rdx.shuf.3 = shufflevector <8 x i32> %bin.rdx.2, <8 x i32> undef,
33 %bin.rdx.3 = add <8 x i32> %bin.rdx.2, %rdx.shuf.3
43 %rdx.shuf.0.0 = shufflevector <4 x float> %rdx, <4 x float> undef,
45 %rdx.shuf.0.1 = shufflevector <4 x float> %rdx, <4 x float> undef,
[all …]
/external/llvm/test/CodeGen/X86/
Dsse-scalar-fp-arith-unary.ll21 %shuf = shufflevector <4 x float> %y, <4 x float> %x, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
22 ret <4 x float> %shuf
36 %shuf = shufflevector <4 x float> %y, <4 x float> %x, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
37 ret <4 x float> %shuf
51 %shuf = shufflevector <4 x float> %y, <4 x float> %x, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
52 ret <4 x float> %shuf
66 %shuf = shufflevector <2 x double> %y, <2 x double> %x, <2 x i32> <i32 0, i32 3>
67 ret <2 x double> %shuf
Dextractelement-shuffle.ll10 %shuf = shufflevector <2 x i64> %val1, <2 x i64> %val2, <2 x i32> <i32 0, i32 3>
11 %bit = bitcast <2 x i64> %shuf to <4 x i32>
Dvec_split.ll71 %rdx.shuf = shufflevector <2 x i128> %add, <2 x i128> undef, <2 x i32> <i32 undef, i32 0>
72 %bin.rdx = add <2 x i128> %add, %rdx.shuf
Dsse-scalar-fp-arith.ll434 %shuf = shufflevector <4 x float> %ins, <4 x float> %a, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
435 ret <4 x float> %shuf
452 %shuf = shufflevector <4 x float> %ins, <4 x float> %a, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
453 ret <4 x float> %shuf
470 %shuf = shufflevector <4 x float> %ins, <4 x float> %a, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
471 ret <4 x float> %shuf
488 %shuf = shufflevector <4 x float> %ins, <4 x float> %a, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
489 ret <4 x float> %shuf
506 %shuf = shufflevector <2 x double> %ins, <2 x double> %a, <2 x i32> <i32 0, i32 3>
507 ret <2 x double> %shuf
[all …]
Dvec_int_to_fp.ll50 %shuf = shufflevector <4 x i32> %a, <4 x i32> undef, <2 x i32> <i32 0, i32 1>
51 %cvt = sitofp <2 x i32> %shuf to <2 x double>
68 %shuf = shufflevector <4 x double> %cvt, <4 x double> undef, <2 x i32> <i32 0, i32 1>
69 ret <2 x double> %shuf
85 %shuf = shufflevector <8 x i16> %a, <8 x i16> undef, <2 x i32> <i32 0, i32 1>
86 %cvt = sitofp <2 x i16> %shuf to <2 x double>
114 %shuf = shufflevector <8 x double> %cvt, <8 x double> undef, <2 x i32> <i32 0, i32 1>
115 ret <2 x double> %shuf
132 %shuf = shufflevector <16 x i8> %a, <16 x i8> undef, <2 x i32> <i32 0, i32 1>
133 %cvt = sitofp <2 x i8> %shuf to <2 x double>
[all …]
Dvec_return.ll12 ; CHECK-NOT: shuf
Davx2-intrinsics-fast-isel.ll207 …%shuf = shufflevector <32 x i8> %arg0, <32 x i8> %arg1, <32 x i32> <i32 2, i32 3, i32 4, i32 5, i3…
208 %res = bitcast <32 x i8> %shuf to <4 x i64>
224 …%shuf = shufflevector <32 x i8> %arg0, <32 x i8> %arg1, <32 x i32> <i32 1, i32 2, i32 3, i32 4, i3…
225 %res = bitcast <32 x i8> %shuf to <4 x i64>
310 …%shuf = shufflevector <16 x i16> %arg0, <16 x i16> %arg1, <16 x i32> <i32 0, i32 17, i32 2, i32 3,…
311 %res = bitcast <16 x i16> %shuf to <4 x i64>
327 %shuf = shufflevector <4 x i32> %arg0, <4 x i32> %arg1, <4 x i32> <i32 4, i32 1, i32 6, i32 3>
328 %res = bitcast <4 x i32> %shuf to <2 x i64>
344 …%shuf = shufflevector <8 x i32> %arg0, <8 x i32> %arg1, <8 x i32> <i32 8, i32 1, i32 10, i32 3, i3…
345 %res = bitcast <8 x i32> %shuf to <4 x i64>
[all …]
Dvec_fp_to_int.ll511 %shuf = shufflevector <4 x float> %a, <4 x float> undef, <2 x i32> <i32 0, i32 1>
512 %cvt = fptosi <2 x float> %shuf to <2 x i64>
538 %shuf = shufflevector <4 x i64> %cvt, <4 x i64> undef, <2 x i32> <i32 0, i32 1>
539 ret <2 x i64> %shuf
595 %shuf = shufflevector <8 x float> %a, <8 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
596 %cvt = fptosi <4 x float> %shuf to <4 x i64>
639 %shuf = shufflevector <8 x i64> %cvt, <8 x i64> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
640 ret <4 x i64> %shuf
734 %shuf = shufflevector <4 x float> %a, <4 x float> undef, <2 x i32> <i32 0, i32 1>
735 %cvt = fptoui <2 x float> %shuf to <2 x i64>
[all …]
Davx-vzeroupper.ll99 …%shuf = shufflevector <4 x float> %a, <4 x float> %b, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4…
102 %call = call <8 x float> @do_avx(<8 x float> %shuf) nounwind
Dwiden_shuffle-1.ll7 define void @shuf(<3 x float>* %dst.addr, <3 x float> %src1,<3 x float> %src2) nounwind {
8 ; CHECK-LABEL: shuf:
Dssse3-intrinsics-fast-isel.ll72 …%shuf = shufflevector <16 x i8> %arg0, <16 x i8> %arg1, <16 x i32> <i32 2, i32 3, i32 4, i32 5, i3…
73 %res = bitcast <16 x i8> %shuf to <2 x i64>
91 …%shuf = shufflevector <16 x i8> %arg0, <16 x i8> %arg1, <16 x i32> <i32 1, i32 2, i32 3, i32 4, i3…
92 %res = bitcast <16 x i8> %shuf to <2 x i64>
/external/llvm/test/CodeGen/AArch64/
Daarch64-minmaxv.ll10 …%rdx.shuf = shufflevector <16 x i8> %arr.load, <16 x i8> undef, <16 x i32> <i32 8, i32 9, i32 10, …
11 %rdx.minmax.cmp22 = icmp sgt <16 x i8> %arr.load, %rdx.shuf
12 …%rdx.minmax.select23 = select <16 x i1> %rdx.minmax.cmp22, <16 x i8> %arr.load, <16 x i8> %rdx.shuf
32 …%rdx.shuf = shufflevector <8 x i16> %rdx.minmax.select, <8 x i16> undef, <8 x i32> <i32 4, i32 5, …
33 %rdx.minmax.cmp23 = icmp sgt <8 x i16> %rdx.minmax.select, %rdx.shuf
34 …max.select24 = select <8 x i1> %rdx.minmax.cmp23, <8 x i16> %rdx.minmax.select, <8 x i16> %rdx.shuf
51 …%rdx.shuf = shufflevector <4 x i32> %rdx.minmax.select, <4 x i32> undef, <4 x i32> <i32 2, i32 3, …
52 %rdx.minmax.cmp18 = icmp sgt <4 x i32> %rdx.minmax.select, %rdx.shuf
53 …max.select19 = select <4 x i1> %rdx.minmax.cmp18, <4 x i32> %rdx.minmax.select, <4 x i32> %rdx.shuf
67 …%rdx.shuf = shufflevector <2 x i64> %rdx.minmax.select, <2 x i64> undef, <2 x i32> <i32 1, i32 und…
[all …]
Daarch64-addv.ll9 …%rdx.shuf = shufflevector <16 x i8> %bin.rdx0, <16 x i8> undef, <16 x i32> <i32 4, i32 5, i32 6, i…
10 %bin.rdx11 = add <16 x i8> %bin.rdx0, %rdx.shuf
23 …%rdx.shuf = shufflevector <8 x i16> %bin.rdx, <8 x i16> undef, <8 x i32> <i32 4, i32 5, i32 6, i32…
24 %bin.rdx11 = add <8 x i16> %bin.rdx, %rdx.shuf
37 …%rdx.shuf = shufflevector <4 x i32> %bin.rdx, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 undef,…
38 %bin.rdx11 = add <4 x i32> %bin.rdx, %rdx.shuf
69 …%rdx.shuf = shufflevector <8 x i32> %9, <8 x i32> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i3…
70 %bin.rdx = add <8 x i32> %9, %rdx.shuf
87 …%rdx.shuf = shufflevector <16 x i32> %bin.rdx0, <16 x i32> undef, <16 x i32> <i32 4, i32 5, i32 6,…
88 %bin.rdx11 = add <16 x i32> %bin.rdx0, %rdx.shuf
/external/syslinux/gpxe/src/arch/i386/interface/syslinux/
Dcomboot_call.c112 comboot_shuffle_descriptor shuf[COMBOOT_MAX_SHUFFLE_DESCRIPTORS]; in shuffle() local
116 copy_from_user ( shuf, real_to_user ( list_segment, list_offset ), 0, in shuffle()
121 userptr_t src_u = phys_to_user ( shuf[ i ].src ); in shuffle()
122 userptr_t dest_u = phys_to_user ( shuf[ i ].dest ); in shuffle()
124 if ( shuf[ i ].src == 0xFFFFFFFF ) { in shuffle()
126 memset_user ( dest_u, 0, 0, shuf[ i ].len ); in shuffle()
127 } else if ( shuf[ i ].dest == 0xFFFFFFFF ) { in shuffle()
129 count = shuf[ i ].len / sizeof( comboot_shuffle_descriptor ); in shuffle()
131 copy_from_user ( shuf, src_u, 0, shuf[ i ].len ); in shuffle()
135 memmove_user ( dest_u, 0, src_u, 0, shuf[ i ].len ); in shuffle()
/external/swiftshader/third_party/LLVM/test/CodeGen/X86/
Dextractelement-shuffle.ll9 %shuf = shufflevector <2 x i64> %val1, <2 x i64> %val2, <2 x i32> <i32 0, i32 3>
10 %bit = bitcast <2 x i64> %shuf to <4 x i32>
Dvec_return.ll4 ; RUN: not grep shuf %t
Dwiden_shuffle-1.ll4 define void @shuf(<3 x float>* %dst.addr, <3 x float> %src1,<3 x float> %src2) nounwind {
6 ; CHECK: shuf:
/external/llvm/test/CodeGen/Generic/
Dvector-redux.ll79 …%rdx.shuf = shufflevector <4 x i32> %bin.rdx, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 undef,…
80 %bin.rdx6 = add <4 x i32> %bin.rdx, %rdx.shuf
150 …%rdx.shuf = shufflevector <4 x i32> %bin.rdx, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 undef,…
151 %bin.rdx11 = and <4 x i32> %bin.rdx, %rdx.shuf
231 …%rdx.shuf = shufflevector <4 x float> %bin.rdx, <4 x float> undef, <4 x i32> <i32 2, i32 3, i32 un…
232 %bin.rdx11 = fadd fast <4 x float> %bin.rdx, %rdx.shuf
/external/mesa3d/src/gallium/auxiliary/rtasm/
Drtasm_x86sse.c1167 unsigned char shuf) in sse_shufps() argument
1169 DUMP_RRI( dst, src, shuf ); in sse_shufps()
1172 emit_1ub(p, shuf); in sse_shufps()
1299 unsigned char shuf) in sse2_pshufd() argument
1301 DUMP_RRI( dst, src, shuf ); in sse2_pshufd()
1304 emit_1ub(p, shuf); in sse2_pshufd()
1310 unsigned char shuf) in sse2_pshuflw() argument
1312 DUMP_RRI( dst, src, shuf ); in sse2_pshuflw()
1315 emit_1ub(p, shuf); in sse2_pshuflw()
1321 unsigned char shuf) in sse2_pshufhw() argument
[all …]
Drtasm_x86sse.h243 unsigned char shuf );
245 unsigned char shuf );
247 unsigned char shuf );
305 unsigned char shuf );
/external/swiftshader/third_party/LLVM/test/CodeGen/ARM/
Dshuffle.ll6 define <8 x i8> @shuf(<8 x i8> %a) nounwind readnone optsize ssp {
/external/llvm/test/CodeGen/ARM/
Dshuffle.ll6 define <8 x i8> @shuf(<8 x i8> %a) nounwind readnone optsize ssp {
/external/mesa3d/src/mesa/x86/rtasm/
Dx86sse.h151 unsigned char shuf );
181 unsigned char shuf );
Dx86sse.c634 unsigned char shuf) in sse_shufps() argument
638 emit_1ub(p, shuf); in sse_shufps()
669 unsigned char shuf) in sse2_pshufd() argument
673 emit_1ub(p, shuf); in sse2_pshufd()

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