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Searched refs:simm9 (Results 1 – 13 of 13) sorted by relevance

/external/llvm/lib/Target/AArch64/
DAArch64InstrAtomics.td55 (am_unscaled8 GPR64sp:$Rn, simm9:$offset)),
56 (LDURBBi GPR64sp:$Rn, simm9:$offset)>;
70 (am_unscaled16 GPR64sp:$Rn, simm9:$offset)),
71 (LDURHHi GPR64sp:$Rn, simm9:$offset)>;
85 (am_unscaled32 GPR64sp:$Rn, simm9:$offset)),
86 (LDURWi GPR64sp:$Rn, simm9:$offset)>;
100 (am_unscaled64 GPR64sp:$Rn, simm9:$offset)),
101 (LDURXi GPR64sp:$Rn, simm9:$offset)>;
142 (am_unscaled8 GPR64sp:$Rn, simm9:$offset), GPR32:$val),
143 (STURBBi GPR32:$val, GPR64sp:$Rn, simm9:$offset)>;
[all …]
DAArch64InstrInfo.td1696 (load (am_unscaled64 GPR64sp:$Rn, simm9:$offset)))]>;
1699 (load (am_unscaled32 GPR64sp:$Rn, simm9:$offset)))]>;
1702 (load (am_unscaled8 GPR64sp:$Rn, simm9:$offset)))]>;
1705 (load (am_unscaled16 GPR64sp:$Rn, simm9:$offset)))]>;
1708 (load (am_unscaled32 GPR64sp:$Rn, simm9:$offset)))]>;
1711 (load (am_unscaled64 GPR64sp:$Rn, simm9:$offset)))]>;
1714 (load (am_unscaled128 GPR64sp:$Rn, simm9:$offset)))]>;
1719 (zextloadi16 (am_unscaled16 GPR64sp:$Rn, simm9:$offset)))]>;
1723 (zextloadi8 (am_unscaled16 GPR64sp:$Rn, simm9:$offset)))]>;
1727 def : Pat<(v2f32 (load (am_unscaled64 GPR64sp:$Rn, simm9:$offset))),
[all …]
DAArch64InstrFormats.td216 // simm9 predicate - True if the immediate is in the range [-256, 255].
221 def simm9 : Operand<i64>, ImmLeaf<i64, [{ return Imm >= -256 && Imm < 256; }]> {
3022 (ins GPR64sp:$Rn, simm9:$offset), asm, pattern>,
3033 (ins regtype:$Rt, GPR64sp:$Rn, simm9:$offset),
3045 (ins prfop:$Rt, GPR64sp:$Rn, simm9:$offset),
3081 (ins GPR64sp:$Rn, simm9:$offset), asm>,
3092 (ins regtype:$Rt, GPR64sp:$Rn, simm9:$offset),
3130 (ins GPR64sp:$Rn, simm9:$offset), asm,
3139 (ins regtype:$Rt, GPR64sp:$Rn, simm9:$offset),
3142 (storeop (Ty regtype:$Rt), GPR64sp:$Rn, simm9:$offset))]>,
[all …]
/external/valgrind/VEX/priv/
Dhost_arm64_defs.c212 ARM64AMode* ARM64AMode_RI9 ( HReg reg, Int simm9 ) { in ARM64AMode_RI9() argument
216 am->ARM64am.RI9.simm9 = simm9; in ARM64AMode_RI9()
217 vassert(-256 <= simm9 && simm9 <= 255); in ARM64AMode_RI9()
246 vex_printf("%d(", am->ARM64am.RI9.simm9); in ppARM64AMode()
3089 Int simm9 = am->ARM64am.RI9.simm9; in do_load_or_store8() local
3090 vassert(-256 <= simm9 && simm9 <= 255); in do_load_or_store8()
3092 simm9 & 0x1FF, X00, in do_load_or_store8()
3138 Int simm9 = am->ARM64am.RI9.simm9; in do_load_or_store16() local
3139 vassert(-256 <= simm9 && simm9 <= 255); in do_load_or_store16()
3141 simm9 & 0x1FF, X00, in do_load_or_store16()
[all …]
Dhost_arm_defs.h171 Int simm9; /* -255 .. 255 */ member
181 extern ARMAMode2* ARMAMode2_RI ( HReg reg, Int simm9 );
Dhost_arm64_defs.h130 Int simm9; /* -256 .. +255 */ member
145 extern ARM64AMode* ARM64AMode_RI9 ( HReg reg, Int simm9 );
Dhost_arm_defs.c273 ARMAMode2* ARMAMode2_RI ( HReg reg, Int simm9 ) { in ARMAMode2_RI() argument
277 am->ARMam2.RI.simm9 = simm9; in ARMAMode2_RI()
278 vassert(-255 <= simm9 && simm9 <= 255); in ARMAMode2_RI()
292 vex_printf("%d(", am->ARMam2.RI.simm9); in ppARMAMode2()
3234 if (am->ARMam2.RI.simm9 < 0) { in emit_ARMInstr()
3236 simm8 = -am->ARMam2.RI.simm9; in emit_ARMInstr()
3239 simm8 = am->ARMam2.RI.simm9; in emit_ARMInstr()
3281 if (am->ARMam2.RI.simm9 < 0) { in emit_ARMInstr()
3283 simm8 = -am->ARMam2.RI.simm9; in emit_ARMInstr()
3286 simm8 = am->ARMam2.RI.simm9; in emit_ARMInstr()
Dguest_arm64_toIR.c4801 Long simm9 = (Long)sx_to_64(imm9, 9); in dis_ARM64_load_store() local
4802 assign(tEA, binop(Iop_Add64, mkexpr(tRN), mkU64(simm9))); in dis_ARM64_load_store()
4829 = wBack && simm9 < 0 && szB == 8 in dis_ARM64_load_store()
4862 nameIReg64orSP(nn), simm9); in dis_ARM64_load_store()
5257 ULong simm9 = sx_to_64(imm9, 9); in dis_ARM64_load_store() local
5260 assign(tEA, binop(Iop_Add64, mkexpr(tRN), mkU64(simm9))); in dis_ARM64_load_store()
5301 ch, nameIRegOrZR(is64, tt), nameIReg64orSP(nn), simm9); in dis_ARM64_load_store()
5333 ULong simm9 = sx_to_64(imm9, 9); in dis_ARM64_load_store() local
5336 assign(tEA, binop(Iop_Add64, mkexpr(tRN), mkU64(simm9))); in dis_ARM64_load_store()
5375 ch, nameIRegOrZR(is64, tt), nameIReg64orSP(nn), (Long)simm9); in dis_ARM64_load_store()
[all …]
Dhost_arm64_isel.c820 && am->ARM64am.RI9.simm9 >= -256 in sane_AMode()
821 && am->ARM64am.RI9.simm9 <= 255 ); in sane_AMode()
Dhost_arm_isel.c954 && am->ARMam2.RI.simm9 >= -255 in sane_AMode2()
955 && am->ARMam2.RI.simm9 <= 255 ); in sane_AMode2()
/external/llvm/lib/Target/Mips/
DMicroMipsInstrInfo.td105 let MIOperandInfo = (ops ptr_rc, simm9);
DMipsInstrInfo.td956 let MIOperandInfo = (ops ptr_rc, simm9);
/external/valgrind/none/tests/arm64/
Dmemory.stdout.exp6 LDUR,STUR (immediate, simm9) (STR cases and wb check are MISSING)
10 LDUR,STUR (immediate, simm9): STR cases are MISSINGLDP,STP (immediate, simm7) (STR cases and wb che…
348 LDUR,STUR (immediate, simm9)