| /external/libjpeg-turbo/simd/ |
| D | jsimd_arm64_neon.S | 289 … smull2 v19.4s, v18.8h, XFIX_P_0_541 /* z1h z1 = MULTIPLY(z2 + z3, FIX_0_541196100); */
321 smull2 v11.4s, v9.8h, XFIX_P_0_298 /* tmp0 = MULTIPLY(tmp0, FIX_0_298631336) */
322 smull2 v13.4s, v7.8h, XFIX_P_2_053 /* tmp1 = MULTIPLY(tmp1, FIX_2_053119869) */
323 smull2 v15.4s, v5.8h, XFIX_P_3_072 /* tmp2 = MULTIPLY(tmp2, FIX_3_072711026) */
324 smull2 v17.4s, v3.8h, XFIX_P_1_501 /* tmp3 = MULTIPLY(tmp3, FIX_1_501321110) */
325 smull2 v27.4s, v26.8h, XFIX_P_1_175 /* z5h z5 = MULTIPLY(z3 + z4, FIX_1_175875602) */
326 smull2 v23.4s, v22.8h, XFIX_N_1_961 /* z3 = MULTIPLY(z3, - FIX_1_961570560) */
327 smull2 v25.4s, v24.8h, XFIX_N_0_390 /* z4 = MULTIPLY(z4, - FIX_0_390180644) */
328 smull2 v19.4s, v18.8h, XFIX_N_0_899 /* z1 = MULTIPLY(z1, - FIX_0_899976223) */
329 smull2 v21.4s, v20.8h, XFIX_N_2_562 /* z2 = MULTIPLY(z2, - FIX_2_562915447) */
[all …]
|
| /external/libavc/common/armv8/ |
| D | ih264_iquant_itrans_recon_av8.s | 561 smull2 v17.4s, v0.8h, v8.8h
563 smull2 v19.4s, v1.8h, v9.8h
565 smull2 v21.4s, v2.8h, v10.8h
567 smull2 v23.4s, v3.8h, v11.8h
569 smull2 v25.4s, v4.8h, v12.8h
571 smull2 v27.4s, v5.8h, v13.8h
573 smull2 v29.4s, v6.8h, v14.8h
575 smull2 v31.4s, v7.8h, v15.8h
|
| /external/llvm/test/MC/AArch64/ |
| D | neon-2velem.s | 222 smull2 v0.4s, v1.8h, v2.h[2]
223 smull2 v0.2d, v1.4s, v2.s[2]
224 smull2 v0.2d, v1.4s, v22.s[2]
|
| D | neon-3vdiff.s | 217 smull2 v0.8h, v1.16b, v2.16b
218 smull2 v0.4s, v1.8h, v2.8h
219 smull2 v0.2d, v1.4s, v2.4s
|
| D | neon-diagnostics.s | 2449 smull2 v0.8h, v1.16h, v2.16b
2450 smull2 v0.4s, v1.8s, v2.8h
2451 smull2 v0.2d, v1.4d, v2.4s
3489 smull2 v0.4h, v1.8h, v2.h[2]
3490 smull2 v0.4s, v1.8h, v2.h[8]
3491 smull2 v0.4s, v1.8h, v16.h[4]
3492 smull2 v0.2s, v1.4s, v2.s[2]
3493 smull2 v0.2d, v1.4s, v2.s[4]
3494 smull2 v0.2d, v1.4s, v22.s[4]
|
| D | arm64-advsimd.s | 1238 smull2.4s v0, v0, v0[1]
1240 smull2.2d v0, v0, v0[3]
1307 ; CHECK: smull2.4s v0, v0, v0[1] ; encoding: [0x00,0xa0,0x50,0x4f]
1309 ; CHECK: smull2.2d v0, v0, v0[3] ; encoding: [0x00,0xa8,0xa0,0x4f]
2138 smull2 v9.8h, v13.16b, v14.16b
2140 smull2 v9.4s, v13.8h, v14.8h
2142 smull2 v9.2d, v13.4s, v14.4s
2144 ; CHECK: smull2.8h v9, v13, v14 ; encoding: [0xa9,0xc1,0x2e,0x4e]
2146 ; CHECK: smull2.4s v9, v13, v14 ; encoding: [0xa9,0xc1,0x6e,0x4e]
2148 ; CHECK: smull2.2d v9, v13, v14 ; encoding: [0xa9,0xc1,0xae,0x4e]
|
| /external/llvm/test/CodeGen/AArch64/ |
| D | arm64-neon-2velem-high.ll | 7 ; CHECK-NEXT: smull2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, [[REPLICATE]].8h
22 ; CHECK-NEXT: smull2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, [[REPLICATE]].8h
33 ; CHECK-NEXT: smull2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, [[REPLICATE]].4s
46 ; CHECK-NEXT: smull2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, [[REPLICATE]].4s
|
| D | arm64-vmul.ll | 1242 ; CHECK-NEXT: smull2.8h v0, v0, v1
1252 ; CHECK: smull2.8h v0, v0, v1
1265 ; CHECK: smull2.4s v0, v0, v1
1278 ; CHECK: smull2.2d v0, v0, v1
1330 ; CHECK-NEXT: smull2.4s v0, v1, v2[1]
1343 ; CHECK-NEXT: smull2.2d v0, v1, v2[1]
1674 ; CHECK: smull2.4s
1692 ; CHECK: smull2.2d
|
| D | arm64-neon-3vdiff.ll | 1375 ; CHECK: smull2 {{v[0-9]+}}.8h, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
1385 ; CHECK: smull2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
1395 ; CHECK: smull2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
|
| /external/vixl/src/aarch64/ |
| D | logic-aarch64.cc | 901 LogicVRegister Simulator::smull2(VectorFormat vform, in smull2() function in vixl::aarch64::Simulator
909 return smull2(vform, dst, src1, dup_element(indexform, temp, src2, index)); in smull2()
3159 LogicVRegister Simulator::smull2(VectorFormat vform, in smull2() function in vixl::aarch64::Simulator
3322 LogicVRegister product = smull2(vform, temp, src1, src2); in sqdmull2()
|
| D | assembler-aarch64.h | 1651 void smull2(const VRegister& vd,
2388 void smull2(const VRegister& vd, const VRegister& vn, const VRegister& vm);
|
| D | simulator-aarch64.h | 2013 LogicVRegister smull2(VectorFormat vform,
2679 V(smull2) \
|
| D | macro-assembler-aarch64.h | 2188 V(smull2, Smull2) \
2379 V(smull2, Smull2) \
|
| D | simulator-aarch64.cc | 3601 smull2(vf_l, rd, rn, rm); in VisitNEON3Different()
3779 Op = &Simulator::smull2; in VisitNEONByIndexedElement()
|
| D | assembler-aarch64.cc | 1918 V(smull2, NEON_SMULL2, vn.IsVector() && vn.IsQ()) \
3005 V(smull2, NEON_SMULL_byelement, vn.IsVector() && vn.IsQ()) \ in NEON_FPBYELEMENT_LIST()
|
| /external/vixl/test/aarch64/ |
| D | test-trace-aarch64.cc | 1507 __ smull2(v3.V2D(), v3.V4S(), v23.V4S()); in GenerateTestSequenceNEON() local
1508 __ smull2(v15.V2D(), v29.V4S(), v6.S(), 1); in GenerateTestSequenceNEON() local
1509 __ smull2(v19.V4S(), v20.V8H(), v30.V8H()); in GenerateTestSequenceNEON() local
1510 __ smull2(v6.V4S(), v10.V8H(), v7.H(), 4); in GenerateTestSequenceNEON() local
1511 __ smull2(v25.V8H(), v8.V16B(), v27.V16B()); in GenerateTestSequenceNEON() local
|
| /external/vixl/test/test-trace-reference/ |
| D | log-disasm | 1273 0x~~~~~~~~~~~~~~~~ 4eb7c063 smull2 v3.2d, v3.4s, v23.4s
1274 0x~~~~~~~~~~~~~~~~ 4fa6a3af smull2 v15.2d, v29.4s, v6.s[1]
1275 0x~~~~~~~~~~~~~~~~ 4e7ec293 smull2 v19.4s, v20.8h, v30.8h
1276 0x~~~~~~~~~~~~~~~~ 4f47a946 smull2 v6.4s, v10.8h, v7.h[4]
1277 0x~~~~~~~~~~~~~~~~ 4e3bc119 smull2 v25.8h, v8.16b, v27.16b
|
| D | log-disasm-colour | 1273 0x~~~~~~~~~~~~~~~~ 4eb7c063 smull2 v3.2d, v3.4s, v23.4s
1274 0x~~~~~~~~~~~~~~~~ 4fa6a3af smull2 v15.2d, v29.4s, v6.s[1]
1275 0x~~~~~~~~~~~~~~~~ 4e7ec293 smull2 v19.4s, v20.8h, v30.8h
1276 0x~~~~~~~~~~~~~~~~ 4f47a946 smull2 v6.4s, v10.8h, v7.h[4]
1277 0x~~~~~~~~~~~~~~~~ 4e3bc119 smull2 v25.8h, v8.16b, v27.16b
|
| D | log-all | 3369 0x~~~~~~~~~~~~~~~~ 4eb7c063 smull2 v3.2d, v3.4s, v23.4s
3371 0x~~~~~~~~~~~~~~~~ 4fa6a3af smull2 v15.2d, v29.4s, v6.s[1]
3373 0x~~~~~~~~~~~~~~~~ 4e7ec293 smull2 v19.4s, v20.8h, v30.8h
3375 0x~~~~~~~~~~~~~~~~ 4f47a946 smull2 v6.4s, v10.8h, v7.h[4]
3377 0x~~~~~~~~~~~~~~~~ 4e3bc119 smull2 v25.8h, v8.16b, v27.16b
|
| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | neon-instructions.txt | 1301 # CHECK: smull2 v0.8h, v1.16b, v2.16b
1302 # CHECK: smull2 v0.4s, v1.8h, v2.8h
1303 # CHECK: smull2 v0.2d, v1.4s, v2.4s
|
| D | arm64-advsimd.txt | 1723 # CHECK: smull2.4s v0, v0, v0[1]
1725 # CHECK: smull2.2d v0, v0, v0[3]
|
| /external/vixl/doc/aarch64/ |
| D | supported-instructions-aarch64.md | 3302 void smull2(const VRegister& vd,
3311 void smull2(const VRegister& vd,
|
| /external/valgrind/none/tests/arm64/ |
| D | fp_and_simd.stdout.exp | 27835 smull2 v29.2d, v20.4s, v3.s[1] 674e526085800d9c99be27b7f8207e07 43bc2157057f3f5e6d9aaa1362dc8cb4…
27836 smull2 v29.2d, v20.4s, v3.s[2] 04e23d193764948a35c9faff0d5c6c0b 54e94114b65f31c35957427c9a947c75…
27839 smull2 v29.4s, v20.8h, v3.h[1] bccd012b33021b83896e64a2f2f636cc ebb18924f5c29dd89fa55df5adf871a2…
27840 smull2 v29.4s, v20.8h, v3.h[1] a76e3c560df4bb9388697a9e03e3f1f6 a2a2914aa6e7c0d9450ad00ab99a4602…
27875 smull2 v2.2d, v11.4s, v29.4s af66c072879b7d6c4d77c9d17ec5a616 20ff4667da5a9c338a9655f9db545e32 …
27877 smull2 v2.4s, v11.8h, v29.8h 14a0031f111bd9501b1965180834074d 669dd875a6c8b190a5c32f12c9defab7 …
27879 smull2 v2.8h, v11.16b, v29.16b c3f4c6947d6372cbb4b0c02ce9eb016e 0d0de060bb2822a70c32480ccfb0aeec…
|