| /external/arm-neon-tests/ |
| D | ref_dsp.c | 393 sres = smulwt(svar1, svar2); in exec_dsp()
400 sres = smulwt(svar1, svar2); in exec_dsp()
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| D | ref-rvct-all.txt | 8035 smulwt(0x12345678, 0x12345678) = 0x14b60b6
8037 smulwt(0xf123f456, 0xf123f456) = 0xdcdc99
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| /external/llvm/test/CodeGen/ARM/ |
| D | smul.ll | 133 ; CHECK: smulwt
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| /external/valgrind/none/tests/arm/ |
| D | v6media.stdout.exp | 434 smulwt r0, r1, r2 :: rd 0x00000000 rm 0x00000003, rn 0x00040000, carryin 0, cpsr 0x00000000 g…
435 smulwt r0, r1, r2 :: rd 0x00000004 rm 0x00010003, rn 0x00040002, carryin 0, cpsr 0x00000000 g…
436 smulwt r0, r1, r2 :: rd 0xfffe0004 rm 0x80010003, rn 0x00047fff, carryin 0, cpsr 0x00000000 g…
437 smulwt r0, r1, r2 :: rd 0x0001fffc rm 0x7fff0003, rn 0x00047fff, carryin 0, cpsr 0x00000000 g…
438 smulwt r0, r1, r2 :: rd 0xfffffffc rm 0xffff0003, rn 0x0004ffff, carryin 0, cpsr 0x00000000 g…
439 smulwt r0, r1, r2 :: rd 0xf9617a93 rm 0x2575feb2, rn 0xd2c4287c, carryin 0, cpsr 0x00000000 g…
440 smulwt r0, r1, r2 :: rd 0xfe996a3e rm 0xfb412431, rn 0x4b90362d, carryin 0, cpsr 0x00000000 g…
441 smulwt r0, r1, r2 :: rd 0xfff8d53e rm 0x004dfbe5, rn 0xe87927cc, carryin 0, cpsr 0x00000000 g…
442 smulwt r0, r1, r2 :: rd 0xffb2f79c rm 0xf6a3fa3c, rn 0x083b3571, carryin 0, cpsr 0x00000000 g…
443 smulwt r0, r1, r2 :: rd 0x11e2f016 rm 0xbf17fb9a, rn 0xb9743941, carryin 0, cpsr 0x00000000 g…
[all …]
|
| /external/vixl/test/aarch32/ |
| D | test-assembler-cond-rd-rn-rm-t32.cc | 75 M(smulwt) \
|
| D | test-assembler-cond-rd-rn-rm-a32.cc | 76 M(smulwt) \
|
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| D | basic-arm-instructions.s | 1811 smulwt r3, r9, r2
1814 @ CHECK: smulwt r3, r9, r2 @ encoding: [0xe9,0x02,0x23,0xe1]
|
| D | basic-thumb2-instructions.s | 2069 smulwt r3, r9, r2
2075 @ CHECK: smulwt r3, r9, r2 @ encoding: [0x39,0xfb,0x12,0xf3]
|
| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 3155 void smulwt(Condition cond, Register rd, Register rn, Register rm);
3156 void smulwt(Register rd, Register rn, Register rm) { smulwt(al, rd, rn, rm); } in smulwt() function
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| D | disasm-aarch32.h | 1055 void smulwt(Condition cond, Register rd, Register rn, Register rm);
|
| D | assembler-aarch32.cc | 9742 void Assembler::smulwt(Condition cond, Register rd, Register rn, Register rm) { in smulwt() function in vixl::aarch32::Assembler
9759 Delegate(kSmulwt, &Assembler::smulwt, cond, rd, rn, rm); in smulwt()
|
| D | disasm-aarch32.cc | 2849 void Disassembler::smulwt(Condition cond, in smulwt() function in vixl::aarch32::Disassembler
22131 smulwt(CurrentCond(), in DecodeT32()
57143 smulwt(condition, in DecodeA32()
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| D | macro-assembler-aarch32.h | 4151 smulwt(cond, rd, rn, rm); in Smulwt()
|
| /external/llvm/test/MC/ARM/ |
| D | basic-thumb2-instructions.s | 2504 smulwt r3, r9, r2
2510 @ CHECK: smulwt r3, r9, r2 @ encoding: [0x39,0xfb,0x12,0xf3]
|
| D | basic-arm-instructions.s | 2584 smulwt r3, r9, r2
2587 @ CHECK: smulwt r3, r9, r2 @ encoding: [0xe9,0x02,0x23,0xe1]
|
| /external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
| D | basic-arm-instructions.txt | 1640 # CHECK: smulwt r3, r9, r2
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | basic-arm-instructions.txt | 1792 # CHECK: smulwt r3, r9, r2
|