| /external/llvm/test/MC/AArch64/ |
| D | arm64-v128_lo-diagnostics.s | 10 sqdmull2 v0.4h, v1.8h, v16.h[0]
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| D | neon-2velem.s | 250 sqdmull2 v0.4s, v1.8h, v2.h[2]
251 sqdmull2 v0.2d, v1.4s, v2.s[2]
252 sqdmull2 v0.2d, v1.4s, v22.s[2]
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| D | neon-3vdiff.s | 275 sqdmull2 v0.4s, v1.8h, v2.8h
276 sqdmull2 v0.2d, v1.4s, v2.4s
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| D | neon-diagnostics.s | 2568 sqdmull2 v0.4s, v1.8s, v2.8h
2569 sqdmull2 v0.2d, v1.4d, v2.4s
2580 sqdmull2 v0.8h, v1.16b, v2.16b
3589 sqdmull2 v0.4h, v1.8h, v2.h[2]
3590 sqdmull2 v0.4s, v1.8h, v2.h[8]
3591 sqdmull2 v0.4s, v1.8h, v16.h[4]
3592 sqdmull2 v0.2s, v1.4s, v2.s[2]
3593 sqdmull2 v0.2d, v1.4s, v2.s[4]
3594 sqdmull2 v0.2d, v1.4s, v22.s[4]
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| D | arm64-advsimd.s | 1254 sqdmull2.4s v0, v0, v0[1]
1256 sqdmull2.2d v0, v0, v0[3]
1323 ; CHECK: sqdmull2.4s v0, v0, v0[1] ; encoding: [0x00,0xb0,0x50,0x4f]
1325 ; CHECK: sqdmull2.2d v0, v0, v0[3] ; encoding: [0x00,0xb8,0xa0,0x4f]
2042 sqdmull2 v10.4s, v13.8h, v13.8h
2044 sqdmull2 v10.2d, v13.4s, v13.4s
2046 ; CHECK: sqdmull2.4s v10, v13, v13 ; encoding: [0xaa,0xd1,0x6d,0x4e]
2048 ; CHECK: sqdmull2.2d v10, v13, v13 ; encoding: [0xaa,0xd1,0xad,0x4e]
|
| /external/llvm/test/CodeGen/AArch64/ |
| D | arm64-neon-2velem-high.ll | 107 ; CHECK-NEXT: sqdmull2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, [[REPLICATE]].8h
122 ; CHECK-NEXT: sqdmull2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, [[REPLICATE]].8h
133 ; CHECK-NEXT: sqdmull2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, [[REPLICATE]].4s
146 ; CHECK-NEXT: sqdmull2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, [[REPLICATE]].4s
|
| D | arm64-vmul.ll | 86 ;CHECK: sqdmull2.4s
97 ;CHECK: sqdmull2.2d
877 ;CHECK: sqdmull2.4s
889 ;CHECK: sqdmull2.2d
1785 ; CHECK: sqdmull2.2d
1810 ; CHECK: sqdmull2.2d
1848 ; CHECK: sqdmull2.2d
|
| D | arm64-neon-3vdiff.ll | 1727 ; CHECK: sqdmull2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
1737 ; CHECK: sqdmull2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
|
| /external/vixl/src/aarch64/ |
| D | logic-aarch64.cc | 1045 LogicVRegister Simulator::sqdmull2(VectorFormat vform, in sqdmull2() function in vixl::aarch64::Simulator
1053 return sqdmull2(vform, dst, src1, dup_element(indexform, temp, src2, index)); in sqdmull2()
3282 LogicVRegister product = sqdmull2(vform, temp, src1, src2); in sqdmlal2()
3302 LogicVRegister product = sqdmull2(vform, temp, src1, src2); in sqdmlsl2()
3317 LogicVRegister Simulator::sqdmull2(VectorFormat vform, in sqdmull2() function in vixl::aarch64::Simulator
|
| D | assembler-aarch64.h | 1675 void sqdmull2(const VRegister& vd,
2406 void sqdmull2(const VRegister& vd, const VRegister& vn, const VRegister& vm);
|
| D | simulator-aarch64.h | 2073 LogicVRegister sqdmull2(VectorFormat vform,
2695 V(sqdmull2)
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| D | macro-assembler-aarch64.h | 2196 V(sqdmull2, Sqdmull2) \
2373 V(sqdmull2, Sqdmull2) \
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| D | simulator-aarch64.cc | 3625 sqdmull2(vf_l, rd, rn, rm); in VisitNEON3Different()
3821 Op = &Simulator::sqdmull2; in VisitNEONByIndexedElement()
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| D | assembler-aarch64.cc | 1932 V(sqdmull2, NEON_SQDMULL2, vn.Is1H() || vn.Is1S() || vn.Is8H() || vn.Is4S()) \
2999 V(sqdmull2, NEON_SQDMULL_byelement, vn.IsVector() && vn.IsQ()) \ in NEON_FPBYELEMENT_LIST()
|
| /external/vixl/test/aarch64/ |
| D | test-trace-aarch64.cc | 1578 __ sqdmull2(v28.V2D(), v14.V4S(), v2.V4S()); in GenerateTestSequenceNEON() local
1579 __ sqdmull2(v1.V2D(), v24.V4S(), v13.S(), 2); in GenerateTestSequenceNEON() local
1580 __ sqdmull2(v11.V4S(), v17.V8H(), v31.V8H()); in GenerateTestSequenceNEON() local
1581 __ sqdmull2(v1.V4S(), v20.V8H(), v11.H(), 3); in GenerateTestSequenceNEON() local
|
| /external/vixl/test/test-trace-reference/ |
| D | log-disasm | 1344 0x~~~~~~~~~~~~~~~~ 4ea2d1dc sqdmull2 v28.2d, v14.4s, v2.4s
1345 0x~~~~~~~~~~~~~~~~ 4f8dbb01 sqdmull2 v1.2d, v24.4s, v13.s[2]
1346 0x~~~~~~~~~~~~~~~~ 4e7fd22b sqdmull2 v11.4s, v17.8h, v31.8h
1347 0x~~~~~~~~~~~~~~~~ 4f7bb281 sqdmull2 v1.4s, v20.8h, v11.h[3]
|
| D | log-disasm-colour | 1344 0x~~~~~~~~~~~~~~~~ 4ea2d1dc sqdmull2 v28.2d, v14.4s, v2.4s
1345 0x~~~~~~~~~~~~~~~~ 4f8dbb01 sqdmull2 v1.2d, v24.4s, v13.s[2]
1346 0x~~~~~~~~~~~~~~~~ 4e7fd22b sqdmull2 v11.4s, v17.8h, v31.8h
1347 0x~~~~~~~~~~~~~~~~ 4f7bb281 sqdmull2 v1.4s, v20.8h, v11.h[3]
|
| D | log-all | 3511 0x~~~~~~~~~~~~~~~~ 4ea2d1dc sqdmull2 v28.2d, v14.4s, v2.4s
3513 0x~~~~~~~~~~~~~~~~ 4f8dbb01 sqdmull2 v1.2d, v24.4s, v13.s[2]
3515 0x~~~~~~~~~~~~~~~~ 4e7fd22b sqdmull2 v11.4s, v17.8h, v31.8h
3517 0x~~~~~~~~~~~~~~~~ 4f7bb281 sqdmull2 v1.4s, v20.8h, v11.h[3]
|
| /external/vixl/doc/aarch64/ |
| D | supported-instructions-aarch64.md | 3452 void sqdmull2(const VRegister& vd,
3462 void sqdmull2(const VRegister& vd,
|
| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | arm64-advsimd.txt | 1739 # CHECK: sqdmull2.4s v0, v0, v0[1]
1741 # CHECK: sqdmull2.2d v0, v0, v0[3]
|
| D | neon-instructions.txt | 1351 # CHECK: sqdmull2 v0.4s, v1.8h, v2.8h
1352 # CHECK: sqdmull2 v0.2d, v1.4s, v2.4s
|
| /external/valgrind/none/tests/arm64/ |
| D | fp_and_simd.stdout.exp | 28003 sqdmull2 v29.2d, v20.4s, v3.s[1] 98e2595a56ab24c21f24ca7588f37c3e e8c88fcc5179f115c77e9ec45198f2…
28004 sqdmull2 v29.2d, v20.4s, v3.s[2] 5bc3b1d05f0a18e0b074959edb1ab94e 92a197cc9c421ac2bbff48b5aaca9d…
28007 sqdmull2 v29.4s, v20.8h, v3.h[1] a2476522977f396945f6e9c18c394d22 1c6b42d88b53ccf6fcc0f72d607367…
28008 sqdmull2 v29.4s, v20.8h, v3.h[1] baccdd322bf69cd9bb07f70601bee5ee ac1b5360e21abe114597ae873c49a6…
28024 sqdmull2 v2.2d, v11.4s, v29.4s 750b4314e716e1ea2da5ac3d9cf10bbc a7b756bf3c3f9213960e77bab7b2d8e9…
28026 sqdmull2 v2.4s, v11.8h, v29.8h b873a6dbbb26a4e1c08baf3087406cef 3130846d6f268bda273864cf48db9e77…
|