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Searched refs:sqshlu (Results 1 – 25 of 26) sorted by relevance

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/external/llvm/test/MC/AArch64/
Dneon-scalar-shift-imm.s97 sqshlu b15, b18, #6
98 sqshlu h19, h17, #6
99 sqshlu s16, s14, #25
100 sqshlu d11, d13, #32
Dneon-simd-shift.s201 sqshlu v0.8b, v1.8b, #3
202 sqshlu v0.4h, v1.4h, #3
203 sqshlu v0.2s, v1.2s, #3
204 sqshlu v0.16b, v1.16b, #3
205 sqshlu v0.8h, v1.8h, #3
206 sqshlu v0.4s, v1.4s, #3
207 sqshlu v0.2d, v1.2d, #3
Darm64-advsimd.s1360 sqshlu b0, b0, #1
1361 sqshlu h0, h0, #2
1362 sqshlu s0, s0, #3
1363 sqshlu d0, d0, #4 define
1409 ; CHECK: sqshlu b0, b0, #1 ; encoding: [0x00,0x64,0x09,0x7f]
1410 ; CHECK: sqshlu h0, h0, #2 ; encoding: [0x00,0x64,0x12,0x7f]
1411 ; CHECK: sqshlu s0, s0, #3 ; encoding: [0x00,0x64,0x23,0x7f]
1412 ; CHECK: sqshlu d0, d0, #4 ; encoding: [0x00,0x64,0x44,0x7f]
1498 sqshlu.8b v0, v0, #1
1499 sqshlu.16b v0, v0, #2
[all …]
Dneon-diagnostics.s1708 sqshlu v0.8b, v1.8h, #3
1709 sqshlu v0.4h, v1.4s, #3
1710 sqshlu v0.2s, v1.2d, #3
1711 sqshlu v0.16b, v1.16b, #8
1712 sqshlu v0.8h, v1.8h, #16
1713 sqshlu v0.4s, v1.4s, #32
1714 sqshlu v0.2d, v1.2d, #64
5053 sqshlu b15, b18, #99
5054 sqshlu h19, h17, #99
5055 sqshlu s16, s14, #99
[all …]
/external/llvm/test/CodeGen/AArch64/
Darm64-vshift.ll555 ;CHECK: sqshlu.8b v0, {{v[0-9]+}}, #1
557 …%tmp3 = call <8 x i8> @llvm.aarch64.neon.sqshlu.v8i8(<8 x i8> %tmp1, <8 x i8> <i8 1, i8 1, i8 1, i…
563 ;CHECK: sqshlu.4h v0, {{v[0-9]+}}, #1
565 …%tmp3 = call <4 x i16> @llvm.aarch64.neon.sqshlu.v4i16(<4 x i16> %tmp1, <4 x i16> <i16 1, i16 1, i…
571 ;CHECK: sqshlu.2s v0, {{v[0-9]+}}, #1
573 … %tmp3 = call <2 x i32> @llvm.aarch64.neon.sqshlu.v2i32(<2 x i32> %tmp1, <2 x i32> <i32 1, i32 1>)
579 ;CHECK: sqshlu.16b v0, {{v[0-9]+}}, #1
581 …%tmp3 = call <16 x i8> @llvm.aarch64.neon.sqshlu.v16i8(<16 x i8> %tmp1, <16 x i8> <i8 1, i8 1, i8 …
587 ;CHECK: sqshlu.8h v0, {{v[0-9]+}}, #1
589 …%tmp3 = call <8 x i16> @llvm.aarch64.neon.sqshlu.v8i16(<8 x i16> %tmp1, <8 x i16> <i16 1, i16 1, i…
[all …]
/external/llvm/test/MC/Disassembler/AArch64/
Darm64-advsimd.txt1815 # CHECK: sqshlu b0, b0, #0x1
1816 # CHECK: sqshlu h0, h0, #0x2
1817 # CHECK: sqshlu s0, s0, #0x3
1818 # CHECK: sqshlu d0, d0, #0x4
2073 # CHECK: sqshlu.8b v0, v0, #0x1
2074 # CHECK: sqshlu.16b v0, v0, #0x2
2075 # CHECK: sqshlu.4h v0, v0, #0x3
2076 # CHECK: sqshlu.8h v0, v0, #0x4
2077 # CHECK: sqshlu.2s v0, v0, #0x5
2078 # CHECK: sqshlu.4s v0, v0, #0x6
[all …]
Dneon-instructions.txt900 # CHECK: sqshlu v0.8b, v1.8b, #3
901 # CHECK: sqshlu v0.4h, v1.4h, #3
902 # CHECK: sqshlu v0.2s, v1.2s, #3
903 # CHECK: sqshlu v0.16b, v1.16b, #3
904 # CHECK: sqshlu v0.8h, v1.8h, #3
905 # CHECK: sqshlu v0.4s, v1.4s, #3
906 # CHECK: sqshlu v0.2d, v1.2d, #3
1894 # CHECK: sqshlu b15, b18, #6
1895 # CHECK: sqshlu h19, h17, #6
1896 # CHECK: sqshlu s16, s14, #25
[all …]
/external/valgrind/none/tests/arm64/
Dfp_and_simd.stdout.exp28302 sqshlu d5, d28, #0 0d74af8ac9fbbcecc10bae47a3f95ce1 89a5245180fb9e50a00715aa85b60a6b 0000000000…
28303 sqshlu d5, d28, #32 67902d5535adfad834ddb0918a95919c bfc5b5473b5d7c1fac6e5e09a785c563 000000000…
28304 sqshlu d5, d28, #63 e0e2aaf8ebaf39cb17955f46f3c6721a e91a801f142d40023446a5ff644d51a9 000000000…
28305 sqshlu s5, s28, #0 4ddd6442f0cf3432415e7941c95b7272 0886b2d3de8ce2ab0d51ac8c2be11cdb 0000000000…
28306 sqshlu s5, s28, #16 66944207ab9ecd358ba70bda88222449 6aa7e039751279a99dd603eff320f245 000000000…
28307 sqshlu s5, s28, #31 89e8a4257bfc65b4545175f190fce981 6f5d6a313a9f68da45b30b081de932c8 000000000…
28308 sqshlu h5, h28, #0 18b9ea7dc0c95b8ffc3c186541c920f8 7889b19a8b120c1e64c923b7071e3d42 0000000000…
28309 sqshlu h5, h28, #8 73e675efdbe50fa6e4485318fc68298f e4091456cb4dc7575bf8abdc149d7294 0000000000…
28310 sqshlu h5, h28, #15 f851a55b2c30e2d86b5586e821bb6526 14bdf343572ef86489200357a148319e 000000000…
28311 sqshlu b5, b28, #0 09d8d8a0118a3307f14212b60ea0339c 6787af42919700244e218c0810fddb3f 0000000000…
[all …]
/external/vixl/test/aarch64/
Dtest-trace-aarch64.cc1656 __ sqshlu(b13, b14, 6); in GenerateTestSequenceNEON() local
1657 __ sqshlu(d0, d16, 44); in GenerateTestSequenceNEON() local
1658 __ sqshlu(h5, h29, 15); in GenerateTestSequenceNEON() local
1659 __ sqshlu(s29, s8, 13); in GenerateTestSequenceNEON() local
1660 __ sqshlu(v27.V16B(), v20.V16B(), 2); in GenerateTestSequenceNEON() local
1661 __ sqshlu(v24.V2D(), v12.V2D(), 11); in GenerateTestSequenceNEON() local
1662 __ sqshlu(v12.V2S(), v19.V2S(), 22); in GenerateTestSequenceNEON() local
1663 __ sqshlu(v8.V4H(), v12.V4H(), 11); in GenerateTestSequenceNEON() local
1664 __ sqshlu(v18.V4S(), v3.V4S(), 8); in GenerateTestSequenceNEON() local
1665 __ sqshlu(v3.V8B(), v10.V8B(), 1); in GenerateTestSequenceNEON() local
[all …]
Dtest-simulator-aarch64.cc4255 DEFINE_TEST_NEON_2OPIMM(sqshlu, Basic, TypeWidthFromZero) in DEFINE_TEST_NEON_2DIFF_FP_SCALAR_SD()
4287 DEFINE_TEST_NEON_2OPIMM_SCALAR(sqshlu, Basic, TypeWidthFromZero) in DEFINE_TEST_NEON_2DIFF_FP_SCALAR_SD()
/external/vixl/test/test-trace-reference/
Dlog-disasm1422 0x~~~~~~~~~~~~~~~~ 7f0e65cd sqshlu b13, b14, #6
1423 0x~~~~~~~~~~~~~~~~ 7f6c6600 sqshlu d0, d16, #44
1424 0x~~~~~~~~~~~~~~~~ 7f1f67a5 sqshlu h5, h29, #15
1425 0x~~~~~~~~~~~~~~~~ 7f2d651d sqshlu s29, s8, #13
1426 0x~~~~~~~~~~~~~~~~ 6f0a669b sqshlu v27.16b, v20.16b, #2
1427 0x~~~~~~~~~~~~~~~~ 6f4b6598 sqshlu v24.2d, v12.2d, #11
1428 0x~~~~~~~~~~~~~~~~ 2f36666c sqshlu v12.2s, v19.2s, #22
1429 0x~~~~~~~~~~~~~~~~ 2f1b6588 sqshlu v8.4h, v12.4h, #11
1430 0x~~~~~~~~~~~~~~~~ 6f286472 sqshlu v18.4s, v3.4s, #8
1431 0x~~~~~~~~~~~~~~~~ 2f096543 sqshlu v3.8b, v10.8b, #1
[all …]
Dlog-disasm-colour1422 0x~~~~~~~~~~~~~~~~ 7f0e65cd sqshlu b13, b14, #6
1423 0x~~~~~~~~~~~~~~~~ 7f6c6600 sqshlu d0, d16, #44
1424 0x~~~~~~~~~~~~~~~~ 7f1f67a5 sqshlu h5, h29, #15
1425 0x~~~~~~~~~~~~~~~~ 7f2d651d sqshlu s29, s8, #13
1426 0x~~~~~~~~~~~~~~~~ 6f0a669b sqshlu v27.16b, v20.16b, #2
1427 0x~~~~~~~~~~~~~~~~ 6f4b6598 sqshlu v24.2d, v12.2d, #11
1428 0x~~~~~~~~~~~~~~~~ 2f36666c sqshlu v12.2s, v19.2s, #22
1429 0x~~~~~~~~~~~~~~~~ 2f1b6588 sqshlu v8.4h, v12.4h, #11
1430 0x~~~~~~~~~~~~~~~~ 6f286472 sqshlu v18.4s, v3.4s, #8
1431 0x~~~~~~~~~~~~~~~~ 2f096543 sqshlu v3.8b, v10.8b, #1
[all …]
Dlog-all3667 0x~~~~~~~~~~~~~~~~ 7f0e65cd sqshlu b13, b14, #6
3669 0x~~~~~~~~~~~~~~~~ 7f6c6600 sqshlu d0, d16, #44
3671 0x~~~~~~~~~~~~~~~~ 7f1f67a5 sqshlu h5, h29, #15
3673 0x~~~~~~~~~~~~~~~~ 7f2d651d sqshlu s29, s8, #13
3675 0x~~~~~~~~~~~~~~~~ 6f0a669b sqshlu v27.16b, v20.16b, #2
3677 0x~~~~~~~~~~~~~~~~ 6f4b6598 sqshlu v24.2d, v12.2d, #11
3679 0x~~~~~~~~~~~~~~~~ 2f36666c sqshlu v12.2s, v19.2s, #22
3681 0x~~~~~~~~~~~~~~~~ 2f1b6588 sqshlu v8.4h, v12.4h, #11
3683 0x~~~~~~~~~~~~~~~~ 6f286472 sqshlu v18.4s, v3.4s, #8
3685 0x~~~~~~~~~~~~~~~~ 2f096543 sqshlu v3.8b, v10.8b, #1
[all …]
/external/libjpeg-turbo/simd/
Djsimd_arm64_neon.S1600 sqshlu v21.8h, v20.8h, #8
1601 sqshlu v25.8h, v24.8h, #8
1602 sqshlu v29.8h, v28.8h, #8
1637 sqshlu v21.8h, v20.8h, #8
1638 sqshlu v25.8h, v24.8h, #8
1639 sqshlu v29.8h, v28.8h, #8
/external/vixl/src/aarch64/
Dsimulator-aarch64.cc4870 sqshlu(vf, rd, rn, left_shift); in VisitNEONScalarShiftImmediate()
4997 sqshlu(vf, rd, rn, left_shift); in VisitNEONShiftImmediate()
Dassembler-aarch64.h2023 void sqshlu(const VRegister& vd, const VRegister& vn, int shift);
Dsimulator-aarch64.h2546 LogicVRegister sqshlu(VectorFormat vform,
Dmacro-assembler-aarch64.h2417 V(sqshlu, Sqshlu) \
Dlogic-aarch64.cc1752 LogicVRegister Simulator::sqshlu(VectorFormat vform, in sqshlu() function in vixl::aarch64::Simulator
Dassembler-aarch64.cc3647 void Assembler::sqshlu(const VRegister& vd, const VRegister& vn, int shift) { in sqshlu() function in vixl::aarch64::Assembler
/external/vixl/doc/aarch64/
Dsupported-instructions-aarch64.md3561 void sqshlu(const VRegister& vd,
/external/llvm/lib/Target/AArch64/
DAArch64InstrInfo.td4720 defm SQSHLU : SIMDScalarLShiftBHSD<1, 0b01100, "sqshlu", AArch64sqshlui>;
4769 defm SQSHLU : SIMDVectorLShiftBHSD<1, 0b01100, "sqshlu", AArch64sqshlui>;
/external/swiftshader/third_party/llvm-subzero/build/Android/include/llvm/IR/
DIntrinsics.gen278 aarch64_neon_sqshlu, // llvm.aarch64.neon.sqshlu
6336 "llvm.aarch64.neon.sqshlu",
14276 1, // llvm.aarch64.neon.sqshlu
/external/swiftshader/third_party/llvm-subzero/build/MacOS/include/llvm/IR/
DIntrinsics.gen270 aarch64_neon_sqshlu, // llvm.aarch64.neon.sqshlu
6294 "llvm.aarch64.neon.sqshlu",
14179 1, // llvm.aarch64.neon.sqshlu
/external/swiftshader/third_party/llvm-subzero/build/Windows/include/llvm/IR/
DIntrinsics.gen278 aarch64_neon_sqshlu, // llvm.aarch64.neon.sqshlu
6336 "llvm.aarch64.neon.sqshlu",
14276 1, // llvm.aarch64.neon.sqshlu

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