/external/llvm/test/MC/Mips/ |
D | micromips-shift-instructions.s | 13 # CHECK-EL: srav $2, $3, $5 # encoding: [0x65,0x00,0x90,0x10] 19 # CHECK-EL: srav $2, $3, $5 # encoding: [0x65,0x00,0x90,0x10] 22 # CHECK-EL: srav $2, $2, $3 # encoding: [0x43,0x00,0x90,0x10] 33 # CHECK-EB: srav $2, $3, $5 # encoding: [0x00,0x65,0x10,0x90] 39 # CHECK-EB: srav $2, $3, $5 # encoding: [0x00,0x65,0x10,0x90] 42 # CHECK-EB: srav $2, $2, $3 # encoding: [0x00,0x43,0x10,0x90] 50 srav $2, $3, $5
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D | mips-alu-instructions.s | 29 # CHECK: srav $2, $3, $5 # encoding: [0x07,0x10,0xa3,0x00] 60 srav $2, $3, $5
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D | mips64-alu-instructions.s | 27 # CHECK: srav $2, $3, $5 # encoding: [0x07,0x10,0xa3,0x00] 55 srav $2, $3, $5
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/external/swiftshader/third_party/subzero/tests_lit/llvm2ice_tests/ |
D | vector-arith.ll | 348 ; MIPS32: srav 349 ; MIPS32: srav 350 ; MIPS32: srav 351 ; MIPS32: srav 352 ; MIPS32: srav 353 ; MIPS32: srav 354 ; MIPS32: srav 355 ; MIPS32: srav 356 ; MIPS32: srav 357 ; MIPS32: srav [all …]
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/external/llvm/test/CodeGen/Mips/llvm-ir/ |
D | ashr.ll | 50 ; ALL: srav $2, $4, $[[T0]] 64 ; ALL: srav $2, $4, $[[T0]] 74 ; ALL: srav $2, $4, $5 84 ; M2: srav $[[T0:[0-9]+]], $4, $7 106 ; 32R1-R5: srav $[[T4:[0-9]+]], $4, $7 113 ; 32R6: srav $[[T0:[0-9]+]], $4, $7 136 ; MMR3: srav $[[T5:[0-9]+]], $4, $7 142 ; MMR6: srav $[[T0:[0-9]+]], $4, $7
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/external/valgrind/none/tests/mips32/ |
D | MIPS32int.stdout.exp-mips32-LE | 839 srav $t0, $t1, $t2 :: rd 0x00000000 rs 0x31415927, rt 0xffffffff 840 srav $t0, $t1, $t2 :: rd 0x31415927 rs 0x31415927, rt 0xee00ee00 841 srav $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x000000ff 842 srav $t0, $t1, $t2 :: rd 0xffffffff rs 0xffffffff, rt 0x00000000 843 srav $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x00000001 844 srav $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x00000000 845 srav $t0, $t1, $t2 :: rd 0xffffffff rs 0x80000000, rt 0xffffffff 846 srav $t0, $t1, $t2 :: rd 0x80000000 rs 0x80000000, rt 0x80000000 847 srav $t0, $t1, $t2 :: rd 0x7fffffff rs 0x7fffffff, rt 0x00000000 848 srav $t0, $t1, $t2 :: rd 0x80000000 rs 0x80000000, rt 0x80000000 [all …]
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D | MIPS32int.stdout.exp-mips32-BE | 839 srav $t0, $t1, $t2 :: rd 0x00000000 rs 0x31415927, rt 0xffffffff 840 srav $t0, $t1, $t2 :: rd 0x31415927 rs 0x31415927, rt 0xee00ee00 841 srav $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x000000ff 842 srav $t0, $t1, $t2 :: rd 0xffffffff rs 0xffffffff, rt 0x00000000 843 srav $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x00000001 844 srav $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x00000000 845 srav $t0, $t1, $t2 :: rd 0xffffffff rs 0x80000000, rt 0xffffffff 846 srav $t0, $t1, $t2 :: rd 0x80000000 rs 0x80000000, rt 0x80000000 847 srav $t0, $t1, $t2 :: rd 0x7fffffff rs 0x7fffffff, rt 0x00000000 848 srav $t0, $t1, $t2 :: rd 0x80000000 rs 0x80000000, rt 0x80000000 [all …]
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D | MIPS32int.stdout.exp-mips32r2-BE | 1317 srav $t0, $t1, $t2 :: rd 0x00000000 rs 0x31415927, rt 0xffffffff 1318 srav $t0, $t1, $t2 :: rd 0x31415927 rs 0x31415927, rt 0xee00ee00 1319 srav $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x000000ff 1320 srav $t0, $t1, $t2 :: rd 0xffffffff rs 0xffffffff, rt 0x00000000 1321 srav $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x00000001 1322 srav $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x00000000 1323 srav $t0, $t1, $t2 :: rd 0xffffffff rs 0x80000000, rt 0xffffffff 1324 srav $t0, $t1, $t2 :: rd 0x80000000 rs 0x80000000, rt 0x80000000 1325 srav $t0, $t1, $t2 :: rd 0x7fffffff rs 0x7fffffff, rt 0x00000000 1326 srav $t0, $t1, $t2 :: rd 0x80000000 rs 0x80000000, rt 0x80000000 [all …]
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D | MIPS32int.stdout.exp-mips32r2-LE | 1317 srav $t0, $t1, $t2 :: rd 0x00000000 rs 0x31415927, rt 0xffffffff 1318 srav $t0, $t1, $t2 :: rd 0x31415927 rs 0x31415927, rt 0xee00ee00 1319 srav $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x000000ff 1320 srav $t0, $t1, $t2 :: rd 0xffffffff rs 0xffffffff, rt 0x00000000 1321 srav $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x00000001 1322 srav $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x00000000 1323 srav $t0, $t1, $t2 :: rd 0xffffffff rs 0x80000000, rt 0xffffffff 1324 srav $t0, $t1, $t2 :: rd 0x80000000 rs 0x80000000, rt 0x80000000 1325 srav $t0, $t1, $t2 :: rd 0x7fffffff rs 0x7fffffff, rt 0x00000000 1326 srav $t0, $t1, $t2 :: rd 0x80000000 rs 0x80000000, rt 0x80000000 [all …]
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/external/llvm/test/MC/Mips/mips1/ |
D | valid.s | 101 … sra $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07] 102 … srav $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07]
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/external/llvm/test/CodeGen/Mips/ |
D | sra2.ll | 12 ; 16: srav ${{[0-9]+}}, ${{[0-9]+}}
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/external/llvm/test/MC/Mips/mips2/ |
D | valid.s | 129 … sra $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07] 130 … srav $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07]
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/external/llvm/test/MC/Mips/mips32/ |
D | valid.s | 159 … sra $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07] 160 … srav $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07]
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/external/swiftshader/third_party/subzero/tests_lit/assembler/mips32/ |
D | encoding_test_arith.ll | 146 ; ASM-NEXT: srav $a0, $a0, $a1 151 ; DIS-NEXT: 00a42007 srav a0,a0,a1
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/external/llvm/test/MC/Mips/mips32r3/ |
D | valid.s | 194 … sra $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07] 195 … srav $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07]
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/external/llvm/test/MC/Mips/mips3/ |
D | valid.s | 194 … sra $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07] 195 … srav $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07]
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/external/llvm/test/MC/Mips/mips32r5/ |
D | valid.s | 195 … sra $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07] 196 … srav $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07]
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/external/llvm/test/MC/Mips/mips32r2/ |
D | valid.s | 194 … sra $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07] 195 … srav $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07]
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/external/llvm/test/MC/Disassembler/Mips/mips1/ |
D | valid-mips1-el.txt | 96 0x07 0x88 0xb7 0x03 # CHECK: srav $17, $23, $sp 97 0x07 0x88 0xb7 0x03 # CHECK: srav $17, $23, $sp
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D | valid-mips1.txt | 43 0x03 0xb7 0x88 0x07 # CHECK: srav $17, $23, $sp 44 0x03 0xb7 0x88 0x07 # CHECK: srav $17, $23, $sp
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/external/llvm/test/MC/Mips/mips5/ |
D | valid.s | 223 … sra $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07] 224 … srav $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07]
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/external/llvm/test/MC/Mips/mips4/ |
D | valid.s | 222 … sra $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07] 223 … srav $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07]
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/external/llvm/test/MC/Mips/mips64/ |
D | valid.s | 241 … sra $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07] 242 … srav $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07]
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/external/llvm/test/MC/Mips/micromips64r6/ |
D | valid.s | 244 srav $2, $3, $5 # CHECK: srav $2, $3, $5 # encoding: [0x00,0x65,0x10,0x90] 248 sra $2, $3, $5 # CHECK: srav $2, $3, $5 # encoding: [0x00,0x65,0x10,0x90] 251 sra $2, $3 # CHECK: srav $2, $2, $3 # encoding: [0x00,0x43,0x10,0x90]
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/external/llvm/test/MC/Mips/mips64r3/ |
D | valid.s | 267 … sra $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07] 268 … srav $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07]
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