| /external/llvm/test/CodeGen/SystemZ/ |
| D | shift-06.ll | 8 ; CHECK: srlg %r2, %r2, 1
17 ; CHECK: srlg %r2, %r2, 63
26 ; CHECK-NOT: srlg
35 ; CHECK: srlg %r2, %r2, 0(%r3)
44 ; CHECK: srlg %r2, %r2, 10(%r3)
54 ; CHECK: srlg %r2, %r2, 10(%r3)
65 ; CHECK: srlg %r2, %r2, 10(%r3)
77 ; CHECK: srlg %r2, %r2, 524287(%r3)
89 ; CHECK: srlg %r2, %r2, 0(%r3)
99 ; CHECK: srlg %r2, %r2, -1(%r3)
[all …]
|
| D | int-div-06.ll | 10 ; CHECK-DAG: srlg [[RES1:%r[0-5]]], [[REG]], 63
23 ; CHECK: srlg %r2, [[REG]], 46
38 ; CHECK: srlg [[RES1:%r[0-5]]], %r2, 63
52 ; CHECK: srlg %r2, %r2, 15
|
| D | ctpop-01.ll | 54 ; CHECK: srlg %r2, %r1, 56
68 ; CHECK: srlg %r2, %r0, 24
80 ; CHECK: srlg %r2, %r1, 8
|
| D | insert-05.ll | 87 ; CHECK: srlg %r2, %r2, 1
99 ; CHECK: srlg %r2, %r2, 1
111 ; CHECK: srlg %r2, %r2, 1
123 ; CHECK: srlg %r2, %r2, 1
|
| D | shift-11.ll | 39 ; CHECK: srlg %r2, %r2, 0(%r3)
|
| D | int-cmp-12.ll | 59 ; CHECK: srlg [[REG:%r[0-5]]], %r2, 32
|
| D | shift-12.ll | 80 ; CHECK: srlg %r2, %r2, 0(%r3)
|
| D | risbg-01.ll | 82 ; CHECK: srlg %r2, %r2, 2
414 ; CHECK: srlg %r2
498 ; CHECK: srlg [[REG:%r[0-5]]], %r2, 12
|
| D | int-mul-08.ll | 47 ; CHECK: srlg %r2, %r2, 3
79 ; CHECK: srlg %r2, %r2,
|
| D | int-cmp-47.ll | 312 ; CHECK: srlg [[REG:%r[0-5]]], %r2, 48
|
| D | rnsbg-01.ll | 181 ; CHECK: srlg [[REG:%r[01345]]], %r3, 61
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| D | fp-move-02.ll | 85 ; CHECK: srlg %r2, [[REGISTER]], 32
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/SystemZ/ |
| D | 04-RetShifts.ll | 4 ; RUN: llc < %s -march=systemz | grep srlg | count 3
|
| /external/llvm/test/MC/SystemZ/ |
| D | insn-bad.s | 3224 #CHECK: srlg %r0,%r0,-524289
3226 #CHECK: srlg %r0,%r0,524288
3228 #CHECK: srlg %r0,%r0,0(%r0)
3230 #CHECK: srlg %r0,%r0,0(%r1,%r2)
3232 srlg %r0,%r0,-524289
3233 srlg %r0,%r0,524288
3234 srlg %r0,%r0,0(%r0)
3235 srlg %r0,%r0,0(%r1,%r2)
|
| D | insn-good.s | 8950 #CHECK: srlg %r0, %r0, 0 # encoding: [0xeb,0x00,0x00,0x00,0x00,0x0c]
8951 #CHECK: srlg %r15, %r1, 0 # encoding: [0xeb,0xf1,0x00,0x00,0x00,0x0c]
8952 #CHECK: srlg %r1, %r15, 0 # encoding: [0xeb,0x1f,0x00,0x00,0x00,0x0c]
8953 #CHECK: srlg %r15, %r15, 0 # encoding: [0xeb,0xff,0x00,0x00,0x00,0x0c]
8954 #CHECK: srlg %r0, %r0, -524288 # encoding: [0xeb,0x00,0x00,0x00,0x80,0x0c]
8955 #CHECK: srlg %r0, %r0, -1 # encoding: [0xeb,0x00,0x0f,0xff,0xff,0x0c]
8956 #CHECK: srlg %r0, %r0, 1 # encoding: [0xeb,0x00,0x00,0x01,0x00,0x0c]
8957 #CHECK: srlg %r0, %r0, 524287 # encoding: [0xeb,0x00,0x0f,0xff,0x7f,0x0c]
8958 #CHECK: srlg %r0, %r0, 0(%r1) # encoding: [0xeb,0x00,0x10,0x00,0x00,0x0c]
8959 #CHECK: srlg %r0, %r0, 0(%r15) # encoding: [0xeb,0x00,0xf0,0x00,0x00,0x0c]
[all …]
|
| /external/v8/src/compiler/s390/ |
| D | code-generator-s390.cc | 1409 ASSEMBLE_BINOP(srlg); in AssembleArchInstruction()
1534 __ srlg(i.OutputRegister(), i.OutputRegister(), in AssembleArchInstruction() local
1551 __ srlg(i.OutputRegister(), i.OutputRegister(), Operand(clearBit)); in AssembleArchInstruction() local
1565 __ srlg(i.OutputRegister(), i.OutputRegister(), Operand(clearBit)); in AssembleArchInstruction() local
2158 __ srlg(i.OutputRegister(), i.OutputRegister(), Operand(32)); in AssembleArchInstruction() local
|
| /external/v8/src/s390/ |
| D | assembler-s390.h | 1101 void srlg(Register r1, Register r3, const Operand& opnd);
1102 void srlg(Register r1, Register r3, const Register opnd);
|
| D | macro-assembler-s390.cc | 714 srlg(dst_hi, dst, Operand(32)); in ConvertFloat32ToInt64()
746 srlg(dst_hi, dst, Operand(32)); in ConvertDoubleToInt64()
1992 srlg(scratch1, scratch1, Operand(32)); in TestDoubleIsMinusZero()
3244 srlg(dst, dst, Operand(32)); \
3939 srlg(dst, dst, Operand(32)); in MovFloatToInt()
|
| D | assembler-s390.cc | 1689 void Assembler::srlg(Register r1, Register r3, Register opnd) { in srlg() function in v8::internal::Assembler
1695 void Assembler::srlg(Register r1, Register r3, const Operand& opnd) { in srlg() function in v8::internal::Assembler
|
| D | macro-assembler-s390.h | 122 #define ShiftRightP srlg
|
| D | constants-s390.h | 164 V(srlg, SRLG, 0xEB0C) /* type = RSY_A SHIFT RIGHT SINGLE LOGICAL (64) */ \
|
| /external/llvm/test/MC/Disassembler/SystemZ/ |
| D | insns.txt | 8356 # CHECK: srlg %r0, %r0, 0
8359 # CHECK: srlg %r15, %r1, 0
8362 # CHECK: srlg %r1, %r15, 0
8365 # CHECK: srlg %r15, %r15, 0
8368 # CHECK: srlg %r0, %r0, -524288
8371 # CHECK: srlg %r0, %r0, -1
8374 # CHECK: srlg %r0, %r0, 1
8377 # CHECK: srlg %r0, %r0, 524287
8380 # CHECK: srlg %r0, %r0, 0(%r1)
8383 # CHECK: srlg %r0, %r0, 0(%r15)
[all …]
|
| /external/swiftshader/third_party/LLVM/lib/Target/SystemZ/ |
| D | SystemZInstrInfo.td | 940 "srlg\t{$dst, $src, $amt}",
|
| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZInstrInfo.td | 1218 def SRLG : BinaryRSY<"srlg", 0xEB0C, srl, GR64>;
|
| /external/v8/src/crankshaft/s390/ |
| D | lithium-codegen-s390.cc | 2374 __ srlg(scratch, scratch, Operand(32)); in DoShiftI() local
|