| /external/llvm/test/MC/AArch64/ |
| D | neon-simd-shift.s | 83 srshr v0.8b, v1.8b, #3
84 srshr v0.4h, v1.4h, #3
85 srshr v0.2s, v1.2s, #3
86 srshr v0.16b, v1.16b, #3
87 srshr v0.8h, v1.8h, #3
88 srshr v0.4s, v1.4s, #3
89 srshr v0.2d, v1.2d, #3
|
| D | neon-scalar-shift-imm.s | 22 srshr d19, d18, #7
|
| D | arm64-advsimd.s | 1375 srshr d0, d0, #1 define
1424 ; CHECK: srshr d0, d0, #1 ; encoding: [0x00,0x24,0x7f,0x5f]
1531 srshr.8b v0, v0, #1
1532 srshr.16b v0, v0, #2
1533 srshr.4h v0, v0, #3
1534 srshr.8h v0, v0, #4
1535 srshr.2s v0, v0, #5
1536 srshr.4s v0, v0, #6
1537 srshr.2d v0, v0, #7
1703 ; CHECK: srshr.8b v0, v0, #1 ; encoding: [0x00,0x24,0x0f,0x0f]
[all …]
|
| D | neon-diagnostics.s | 1510 srshr v0.8b, v1.8h, #3
1511 srshr v0.4h, v1.4s, #3
1512 srshr v0.2s, v1.2d, #3
1513 srshr v0.16b, v1.16b, #9
1514 srshr v0.8h, v1.8h, #17
1515 srshr v0.4s, v1.4s, #33
1516 srshr v0.2d, v1.2d, #65
4933 srshr d19, d18, #99
|
| /external/libavc/common/armv8/ |
| D | ih264_iquant_itrans_recon_av8.s | 221 srshr v20.8h, v20.8h, #6
222 srshr v22.8h, v22.8h, #6
415 srshr v20.4h, v20.4h, #6
416 srshr v21.4h, v21.4h, #6
417 srshr v22.4h, v22.4h, #6
418 srshr v23.4h, v23.4h, #6
743 srshr v0.8h, v0.8h, #6
744 srshr v1.8h, v1.8h, #6
745 srshr v2.8h, v2.8h, #6
746 srshr v3.8h, v3.8h, #6
[all …]
|
| D | ih264_iquant_itrans_recon_dc_av8.s | 148 srshr v0.8h, v0.8h, #6
234 srshr v0.8h, v0.8h, #6
361 srshr v0.8h, v0.8h, #6
|
| D | ih264_deblk_chroma_av8.s | 540 srshr v14.8h, v14.8h, #3
541 srshr v16.8h, v16.8h, #3 //(((q0 - p0) << 2) + (p1 - q1) + 4) >> 3)
|
| D | ih264_intra_pred_luma_16x16_av8.s | 462 srshr v0.2s, v0.2s, #6 // i_b = D0[0]
|
| /external/libhevc/common/arm64/ |
| D | ihevc_deblk_chroma_horz.s | 145 srshr v6.8h, v6.8h,#3
|
| D | ihevc_deblk_chroma_vert.s | 160 srshr v6.8h, v4.8h,#3
|
| D | ihevc_deblk_luma_horz.s | 488 srshr v10.8h, v10.8h,#4
|
| D | ihevc_deblk_luma_vert.s | 478 srshr v16.8h,v16.8h,#4
|
| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | arm64-advsimd.txt | 1830 # CHECK: srshr d0, d0, #0x3f
2106 # CHECK: srshr.8b v0, v0, #0x7
2107 # CHECK: srshr.16b v0, v0, #0x6
2108 # CHECK: srshr.4h v0, v0, #0xd
2109 # CHECK: srshr.8h v0, v0, #0xc
2110 # CHECK: srshr.2s v0, v0, #0x1b
2111 # CHECK: srshr.4s v0, v0, #0x1a
2112 # CHECK: srshr.2d v0, v0, #0x39
|
| D | neon-instructions.txt | 792 # CHECK: srshr v0.8b, v1.8b, #3
793 # CHECK: srshr v0.4h, v1.4h, #3
794 # CHECK: srshr v0.2s, v1.2s, #3
795 # CHECK: srshr v0.16b, v1.16b, #3
796 # CHECK: srshr v0.8h, v1.8h, #3
797 # CHECK: srshr v0.4s, v1.4s, #3
798 # CHECK: srshr v0.2d, v1.2d, #3
1828 # CHECK: srshr d19, d18, #7
|
| /external/libjpeg-turbo/simd/ |
| D | jsimd_arm64_neon.S | 1080 srshr v20.4s, v20.4s, #\shift
1081 srshr v28.4s, v28.4s, #\shift
1093 srshr v20.4s, v20.4s, #\shift
1094 srshr v30.4s, v30.4s, #\shift
1284 srshr v20.4s, v20.4s, #\shift
1285 srshr v15.4s, v15.4s, #\shift
2459 …srshr v16.8h, v16.8h, #PASS1_BITS /* dataptr[0] = (DCTELEM) DESCALE(tmp10 + tmp11, PASS…
2460 …srshr v20.8h, v20.8h, #PASS1_BITS /* dataptr[4] = (DCTELEM) DESCALE(tmp10 - tmp11, PASS…
|
| /external/llvm/test/CodeGen/AArch64/ |
| D | arm64-vshift.ll | 499 ;CHECK: srshr.8b
507 ;CHECK: srshr.4h
515 ;CHECK: srshr.2s
523 ;CHECK: srshr.16b
531 ;CHECK: srshr.8h
539 ;CHECK: srshr.4s
547 ;CHECK: srshr.2d
|
| /external/valgrind/none/tests/arm64/ |
| D | fp_and_simd.stdout.exp | 28571 srshr d5, d28, #1 42213084af47e8b4c87fdaa0b56dd538 11ad4cd223e8e76bb97ee1df29edf322 00000000000…
28572 srshr d5, d28, #32 5aa4e9545ed81c36b219c002f92c0b7b d1b003e92ce6e82c88a97bf134195b7d 0000000000…
28573 srshr d5, d28, #64 f51bde161bd1874b946b37797ed58c35 aca0ce2b5bc3783ae6857c5199a86509 0000000000…
28577 srshr v6.2d, v27.2d, #1 aa2047540c6bc6e67a5e165c2a406896 b832d6c73ecd88a7eff58478ceee873f dc19…
28578 srshr v6.2d, v27.2d, #32 aed0188695c3be8e46cec161eedd3e31 9ab06c5ff8ffb2ce1585e88c6fa73571 fff…
28579 srshr v6.2d, v27.2d, #64 0ead3d23843984c3e02f15f44b1df73c 6f532d992fc70338a3fdcd66c17b1eca 000…
28580 srshr v6.4s, v27.4s, #1 2997170a38ae7863ab6171f6a1e0f297 98fc7b554407dac7f83f92e5254aa12c cc7e…
28581 srshr v6.4s, v27.4s, #16 5f6e051a1202fb500444354551069021 7489b573969e9759742998ebfaf31e76 000…
28582 srshr v6.4s, v27.4s, #32 1011683571156c684db8c2c1ba6f30bc 63da3cd3856b9bcf789c3e56a058f687 000…
28583 srshr v6.2s, v27.2s, #1 9d629f39b6c62b8ce59d774c3cfa3246 c6d16f55725045096378e40778578840 0000…
[all …]
|
| /external/vixl/test/aarch64/ |
| D | test-trace-aarch64.cc | 1736 __ srshr(d21, d18, 45); in GenerateTestSequenceNEON() local
1737 __ srshr(v3.V16B(), v11.V16B(), 7); in GenerateTestSequenceNEON() local
1738 __ srshr(v21.V2D(), v26.V2D(), 53); in GenerateTestSequenceNEON() local
1739 __ srshr(v11.V2S(), v5.V2S(), 28); in GenerateTestSequenceNEON() local
1740 __ srshr(v7.V4H(), v18.V4H(), 12); in GenerateTestSequenceNEON() local
1741 __ srshr(v7.V4S(), v3.V4S(), 30); in GenerateTestSequenceNEON() local
1742 __ srshr(v14.V8B(), v2.V8B(), 6); in GenerateTestSequenceNEON() local
1743 __ srshr(v21.V8H(), v20.V8H(), 3); in GenerateTestSequenceNEON() local
|
| D | test-simulator-aarch64.cc | 4236 DEFINE_TEST_NEON_2OPIMM(srshr, Basic, TypeWidth) in DEFINE_TEST_NEON_2DIFF_FP_SCALAR_SD()
4271 DEFINE_TEST_NEON_2OPIMM_SCALAR_D(srshr, Basic, TypeWidth) in DEFINE_TEST_NEON_2DIFF_FP_SCALAR_SD()
|
| /external/vixl/test/test-trace-reference/ |
| D | log-disasm | 1502 0x~~~~~~~~~~~~~~~~ 5f532655 srshr d21, d18, #45
1503 0x~~~~~~~~~~~~~~~~ 4f092563 srshr v3.16b, v11.16b, #7
1504 0x~~~~~~~~~~~~~~~~ 4f4b2755 srshr v21.2d, v26.2d, #53
1505 0x~~~~~~~~~~~~~~~~ 0f2424ab srshr v11.2s, v5.2s, #28
1506 0x~~~~~~~~~~~~~~~~ 0f142647 srshr v7.4h, v18.4h, #12
1507 0x~~~~~~~~~~~~~~~~ 4f222467 srshr v7.4s, v3.4s, #30
1508 0x~~~~~~~~~~~~~~~~ 0f0a244e srshr v14.8b, v2.8b, #6
1509 0x~~~~~~~~~~~~~~~~ 4f1d2695 srshr v21.8h, v20.8h, #3
|
| D | log-disasm-colour | 1502 0x~~~~~~~~~~~~~~~~ 5f532655 srshr d21, d18, #45
1503 0x~~~~~~~~~~~~~~~~ 4f092563 srshr v3.16b, v11.16b, #7
1504 0x~~~~~~~~~~~~~~~~ 4f4b2755 srshr v21.2d, v26.2d, #53
1505 0x~~~~~~~~~~~~~~~~ 0f2424ab srshr v11.2s, v5.2s, #28
1506 0x~~~~~~~~~~~~~~~~ 0f142647 srshr v7.4h, v18.4h, #12
1507 0x~~~~~~~~~~~~~~~~ 4f222467 srshr v7.4s, v3.4s, #30
1508 0x~~~~~~~~~~~~~~~~ 0f0a244e srshr v14.8b, v2.8b, #6
1509 0x~~~~~~~~~~~~~~~~ 4f1d2695 srshr v21.8h, v20.8h, #3
|
| D | log-all | 3827 0x~~~~~~~~~~~~~~~~ 5f532655 srshr d21, d18, #45
3829 0x~~~~~~~~~~~~~~~~ 4f092563 srshr v3.16b, v11.16b, #7
3831 0x~~~~~~~~~~~~~~~~ 4f4b2755 srshr v21.2d, v26.2d, #53
3833 0x~~~~~~~~~~~~~~~~ 0f2424ab srshr v11.2s, v5.2s, #28
3835 0x~~~~~~~~~~~~~~~~ 0f142647 srshr v7.4h, v18.4h, #12
3837 0x~~~~~~~~~~~~~~~~ 4f222467 srshr v7.4s, v3.4s, #30
3839 0x~~~~~~~~~~~~~~~~ 0f0a244e srshr v14.8b, v2.8b, #6
3841 0x~~~~~~~~~~~~~~~~ 4f1d2695 srshr v21.8h, v20.8h, #3
|
| /external/vixl/src/aarch64/ |
| D | assembler-aarch64.h | 2253 void srshr(const VRegister& vd, const VRegister& vn, int shift);
|
| D | macro-assembler-aarch64.h | 2423 V(srshr, Srshr) \
|
| /external/vixl/doc/aarch64/ |
| D | supported-instructions-aarch64.md | 3674 void srshr(const VRegister& vd,
|