| /external/valgrind/none/tests/arm/ |
| D | v6media.stdout.exp | 969 ssub16 r0, r1, r2 :: rd 0x01000011 rm 0x04000022, rn 0x03000011, carryin 0, cpsr 0x000f0000 g…
970 ssub16 r0, r1, r2 :: rd 0xfff1fffc rm 0x0009ffff, rn 0x00180003, carryin 0, cpsr 0x00000000 g…
971 ssub16 r0, r1, r2 :: rd 0x000f0004 rm 0x00180003, rn 0x0009ffff, carryin 0, cpsr 0x000f0000 g…
972 ssub16 r0, r1, r2 :: rd 0x0004000f rm 0x00030018, rn 0xffff0009, carryin 0, cpsr 0x000f0000 g…
973 ssub16 r0, r1, r2 :: rd 0xfffcfff1 rm 0xffff0009, rn 0x00030018, carryin 0, cpsr 0x00000000 g…
974 ssub16 r0, r1, r2 :: rd 0x00000000 rm 0x00000000, rn 0x00000000, carryin 0, cpsr 0x000f0000 g…
975 ssub16 r0, r1, r2 :: rd 0x00000001 rm 0x00000001, rn 0x00000000, carryin 0, cpsr 0x000f0000 g…
976 ssub16 r0, r1, r2 :: rd 0x0000ffff rm 0x00000000, rn 0x00000001, carryin 0, cpsr 0x000c0000 g…
977 ssub16 r0, r1, r2 :: rd 0x00000000 rm 0x00000001, rn 0x00000001, carryin 0, cpsr 0x000f0000 g…
978 ssub16 r0, r1, r2 :: rd 0x00000001 rm 0x00000000, rn 0x0000ffff, carryin 0, cpsr 0x000f0000 g…
[all …]
|
| /external/vixl/test/aarch32/ |
| D | test-assembler-cond-rd-rn-rm-t32.cc | 97 M(ssub16) \
|
| D | test-assembler-cond-rd-rn-rm-a32.cc | 98 M(ssub16) \
|
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| D | basic-arm-instructions.s | 1919 ssub16 r1, r0, r6
1924 @ CHECK: ssub16 r1, r0, r6 @ encoding: [0x76,0x1f,0x10,0xe6]
|
| D | basic-thumb2-instructions.s | 2172 ssub16 r1, r0, r6
2178 @ CHECK: ssub16 r1, r0, r6 @ encoding: [0xd0,0xfa,0x06,0xf1]
|
| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 3177 void ssub16(Condition cond, Register rd, Register rn, Register rm);
3178 void ssub16(Register rd, Register rn, Register rm) { ssub16(al, rd, rn, rm); } in ssub16() function
|
| D | disasm-aarch32.h | 1067 void ssub16(Condition cond, Register rd, Register rn, Register rm);
|
| D | assembler-aarch32.cc | 9901 void Assembler::ssub16(Condition cond, Register rd, Register rn, Register rm) { in ssub16() function in vixl::aarch32::Assembler
9918 Delegate(kSsub16, &Assembler::ssub16, cond, rd, rn, rm); in ssub16()
|
| D | disasm-aarch32.cc | 2918 void Disassembler::ssub16(Condition cond, in ssub16() function in vixl::aarch32::Disassembler
21598 ssub16(CurrentCond(), in DecodeT32()
62779 ssub16(condition, Register(rd), Register(rn), Register(rm)); in DecodeA32()
|
| D | macro-assembler-aarch32.h | 4225 ssub16(cond, rd, rn, rm); in Ssub16()
|
| /external/llvm/test/MC/ARM/ |
| D | basic-thumb2-instructions.s | 2633 ssub16 r1, r0, r6
2639 @ CHECK: ssub16 r1, r0, r6 @ encoding: [0xd0,0xfa,0x06,0xf1]
|
| D | basic-arm-instructions.s | 2735 ssub16 r1, r0, r6
2740 @ CHECK: ssub16 r1, r0, r6 @ encoding: [0x76,0x1f,0x10,0xe6]
|
| /external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
| D | basic-arm-instructions.txt | 1746 # CHECK: ssub16 r1, r0, r6
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | basic-arm-instructions.txt | 1898 # CHECK: ssub16 r1, r0, r6
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 1959 def t2SSUB16 : T2I_pam<0b101, 0b0000, "ssub16">;
|
| D | ARMInstrInfo.td | 3192 def SSUB16 : AAI<0b01100001, 0b11110111, "ssub16">;
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 2164 def t2SSUB16 : T2I_pam<0b101, 0b0000, "ssub16">;
|
| D | ARMInstrInfo.td | 3593 def SSUB16 : AAI<0b01100001, 0b11110111, "ssub16">;
|