| /external/libavc/common/armv8/ |
| D | ih264_ihadamard_scaling_av8.s | 111 ssubl v6.4s, v1.4h, v2.4h //x2 = x5 - x6
112 ssubl v7.4s, v0.4h, v3.4h //x3 = x4 - x7
225 ssubl v4.4s, v0.4h, v1.4h //i4_x1 = i4_x4 - i4_x5;...x3
|
| D | ih264_resi_trans_quant_av8.s | 487 ssubl v6.4s, v1.4h, v2.4h //x2 = x5 - x6;
488 ssubl v7.4s, v0.4h, v3.4h //x3 = x4 - x7;
635 ssubl v3.4s, v0.4h, v1.4h //x1 = x4 - x5; x3 = x6 - x7;
|
| D | ih264_iquant_itrans_recon_av8.s | 661 ssubl v22.4s, v13.4h, v11.4h
667 ssubl v26.4s, v15.4h, v9.4h
|
| /external/libhevc/common/arm64/ |
| D | ihevc_itrans_recon_4x4.s | 150 ssubl v17.4s, v0.4h, v2.4h //pi2_src[0] - pi2_src[2]
184 ssubl v17.4s, v0.4h, v2.4h //pi2_src[0] - pi2_src[2]
|
| /external/llvm/test/MC/AArch64/ |
| D | neon-3vdiff.s | 49 ssubl v0.8h, v1.8b, v2.8b
50 ssubl v0.4s, v1.4h, v2.4h
51 ssubl v0.2d, v1.2s, v2.2s
|
| D | neon-diagnostics.s | 2155 ssubl v0.8h, v1.8h, v2.8b
2156 ssubl v0.4s, v1.4s, v2.4h
2157 ssubl v0.2d, v1.2d, v2.2s
|
| /external/llvm/test/CodeGen/AArch64/ |
| D | arm64-vsub.ll | 127 ;CHECK: ssubl.8h
138 ;CHECK: ssubl.4s
149 ;CHECK: ssubl.2d
|
| D | arm64-neon-3vdiff.ll | 301 ; CHECK: ssubl {{v[0-9]+}}.8h, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
311 ; CHECK: ssubl {{v[0-9]+}}.4s, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
321 ; CHECK: ssubl {{v[0-9]+}}.2d, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
|
| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | neon-instructions.txt | 1153 # CHECK: ssubl v0.8h, v1.8b, v2.8b
1154 # CHECK: ssubl v0.4s, v1.4h, v2.4h
1155 # CHECK: ssubl v0.2d, v1.2s, v2.2s
|
| /external/vixl/test/aarch64/ |
| D | test-trace-aarch64.cc | 1782 __ ssubl(v13.V2D(), v14.V2S(), v3.V2S()); in GenerateTestSequenceNEON() local
1783 __ ssubl(v5.V4S(), v16.V4H(), v8.V4H()); in GenerateTestSequenceNEON() local
1784 __ ssubl(v0.V8H(), v28.V8B(), v6.V8B()); in GenerateTestSequenceNEON() local
|
| D | test-simulator-aarch64.cc | 4190 DEFINE_TEST_NEON_3DIFF_LONG(ssubl, Basic)
|
| /external/vixl/test/test-trace-reference/ |
| D | log-disasm | 1548 0x~~~~~~~~~~~~~~~~ 0ea321cd ssubl v13.2d, v14.2s, v3.2s
1549 0x~~~~~~~~~~~~~~~~ 0e682205 ssubl v5.4s, v16.4h, v8.4h
1550 0x~~~~~~~~~~~~~~~~ 0e262380 ssubl v0.8h, v28.8b, v6.8b
|
| D | log-disasm-colour | 1548 0x~~~~~~~~~~~~~~~~ 0ea321cd ssubl v13.2d, v14.2s, v3.2s
1549 0x~~~~~~~~~~~~~~~~ 0e682205 ssubl v5.4s, v16.4h, v8.4h
1550 0x~~~~~~~~~~~~~~~~ 0e262380 ssubl v0.8h, v28.8b, v6.8b
|
| D | log-all | 3919 0x~~~~~~~~~~~~~~~~ 0ea321cd ssubl v13.2d, v14.2s, v3.2s
3921 0x~~~~~~~~~~~~~~~~ 0e682205 ssubl v5.4s, v16.4h, v8.4h
3923 0x~~~~~~~~~~~~~~~~ 0e262380 ssubl v0.8h, v28.8b, v6.8b
|
| /external/vixl/src/aarch64/ |
| D | assembler-aarch64.h | 2199 void ssubl(const VRegister& vd, const VRegister& vn, const VRegister& vm);
|
| D | simulator-aarch64.h | 2388 LogicVRegister ssubl(VectorFormat vform,
|
| D | macro-assembler-aarch64.h | 2204 V(ssubl, Ssubl) \
|
| D | simulator-aarch64.cc | 3544 ssubl(vf_l, rd, rn, rm); in VisitNEON3Different()
|
| D | logic-aarch64.cc | 2981 LogicVRegister Simulator::ssubl(VectorFormat vform, in ssubl() function in vixl::aarch64::Simulator
|
| D | assembler-aarch64.cc | 1921 V(ssubl, NEON_SSUBL, vn.IsVector() && vn.IsD()) \
|
| /external/vixl/doc/aarch64/ |
| D | supported-instructions-aarch64.md | 3737 void ssubl(const VRegister& vd,
|
| /external/valgrind/none/tests/arm64/ |
| D | fp_and_simd.stdout.exp | 27387 ssubl v2.2d, v11.2s, v29.2s c0bf3e3313d664ac817f113b50530893 60921ac83a6c36e4107f13e2f25eff9a …
27389 ssubl v2.4s, v11.4h, v29.4h f4a07ceaa4f2b31ac7cc39b68cac9064 34056b98e5c065346d522f714eb25698 …
27391 ssubl v2.8h, v11.8b, v29.8b 1dd3711a86e3033416500deeec7fcde4 58840dd9b822ada82e148eb4a6b87abd …
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.td | 3557 defm SSUBL : SIMDLongThreeVectorBHS<0, 0b0010, "ssubl",
|