| /external/llvm/test/MC/ARM/ |
| D | load-store-acquire-release-v8.s | 41 stlb r2, [r1]
44 @ CHECK: stlb r2, [r1] @ encoding: [0x92,0xfc,0xc1,0xe1]
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| D | load-store-acquire-release-v8-thumb.s | 41 stlb r2, [r1]
44 @ CHECK: stlb r2, [r1] @ encoding: [0xc1,0xe8,0x8f,0x2f]
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| D | thumbv8m.s | 112 stlb r1, [r3] label
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| /external/llvm/test/MC/Disassembler/ARM/ |
| D | load-store-acquire-release-v8.txt | 31 # CHECK: stlb r2, [r1] @ encoding: [0x92,0xfc,0xc1,0xe1]
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| D | load-store-acquire-release-v8-thumb.txt | 32 # CHECK: stlb r2, [r1] @ encoding: [0xc1,0xe8,0x8f,0x2f]
|
| /external/valgrind/none/tests/arm/ |
| D | v8memory_t.stdout.exp | 65 stlb r9, [r10] with r10 = middle_of_block
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| D | v8memory_a.stdout.exp | 65 stlb r9, [r10] with r10 = middle_of_block
|
| /external/llvm/test/CodeGen/ARM/ |
| D | atomic-ops-v8.ll | 1320 ; CHECK: stlb r0, [r[[ADDR]]]
1337 ; CHECK: stlb r0, [r[[ADDR]]]
|
| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 3186 void stlb(Condition cond, Register rt, const MemOperand& operand);
3187 void stlb(Register rt, const MemOperand& operand) { stlb(al, rt, operand); } in stlb() function
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| D | disasm-aarch32.h | 1073 void stlb(Condition cond, Register rt, const MemOperand& operand);
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| D | assembler-aarch32.cc | 9966 void Assembler::stlb(Condition cond, Register rt, const MemOperand& operand) { in stlb() function in vixl::aarch32::Assembler
9988 Delegate(kStlb, &Assembler::stlb, cond, rt, operand); in stlb()
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| D | disasm-aarch32.cc | 2950 void Disassembler::stlb(Condition cond, in stlb() function in vixl::aarch32::Disassembler
10048 stlb(CurrentCond(), in DecodeT32()
58540 stlb(condition, in DecodeA32()
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| D | macro-assembler-aarch32.h | 4259 stlb(cond, rt, operand); in Stlb()
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 1605 "stlb", "\t$Rt, $addr", []>;
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| D | ARMInstrInfo.td | 3118 NoItinerary, "stlb", "\t$Rt, $addr", []>;
|