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Searched refs:stlex (Results 1 – 22 of 22) sorted by relevance

/external/llvm/test/CodeGen/ARM/
Dldaex-stlex.ll70 %res = call i32 @llvm.arm.stlex.p0i8(i32 %extval, i8* %addr)
79 %res = call i32 @llvm.arm.stlex.p0i16(i32 %extval, i16* %addr)
84 ; CHECK: stlex r0, r1, [r2]
86 %res = call i32 @llvm.arm.stlex.p0i32(i32 %val, i32* %addr)
90 declare i32 @llvm.arm.stlex.p0i8(i32, i8*) nounwind
91 declare i32 @llvm.arm.stlex.p0i16(i32, i16*) nounwind
92 declare i32 @llvm.arm.stlex.p0i32(i32, i32*) nounwind
Datomic-ops-v8.ll70 ; CHECK-NEXT: stlex [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]]
262 ; CHECK-NEXT: stlex [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]]
454 ; CHECK-NEXT: stlex [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]]
547 ; CHECK-NEXT: stlex [[STATUS:r[0-9]+]], r0, [r[[ADDR]]]
761 ; CHECK-NEXT: stlex [[STATUS:r[0-9]+]], r[[NEW]], [r[[ADDR]]]
874 ; CHECK-NEXT: stlex [[STATUS:r[0-9]+]], r[[NEW]], [r[[ADDR]]]
987 ; CHECK-NEXT: stlex [[STATUS:r[0-9]+]], r[[NEW]], [r[[ADDR]]]
1116 ; CHECK: stlex [[STATUS:r[0-9]+]], r1, [r[[ADDR]]]
/external/llvm/test/MC/ARM/
Dload-store-acquire-release-v8.s19 stlex r2, r1, [r7]
23 @ CHECK: stlex r2, r1, [r7] @ encoding: [0x91,0x2e,0x87,0xe1]
Dload-store-acquire-release-v8-thumb.s19 stlex r2, r1, [r7]
23 @ CHECK: stlex r2, r1, [r7] @ encoding: [0xc7,0xe8,0xe2,0x1f]
Dthumbv8m.s130 stlex r1, r2, [r3] label
/external/llvm/test/MC/Disassembler/ARM/
Dload-store-acquire-release-v8.txt17 # CHECK: stlex r2, r1, [r7] @ encoding: [0x91,0x2e,0x87,0xe1]
Dload-store-acquire-release-v8-thumb.txt18 # CHECK: stlex r2, r1, [r7] @ encoding: [0xc7,0xe8,0xe2,0x1f]
/external/llvm/test/Transforms/AtomicExpand/ARM/
Datomic-expansion-v8.ll30 ; CHECK: [[TRYAGAIN:%.*]] = call i32 @llvm.arm.stlex.p0i16(i32 [[NEWVAL32]], i16* %ptr)
98 ; CHECK: [[TRYAGAIN:%.*]] = call i32 @llvm.arm.stlex.p0i8(i32 [[NEWVAL32]], i8* %ptr)
136 ; CHECK: [[TRYAGAIN:%.*]] = call i32 @llvm.arm.stlex.p0i16(i32 [[NEWVAL32]], i16* %ptr)
/external/valgrind/none/tests/arm/
Dv8memory_t.stdout.exp159 clrex; stlex r9, r6, [r10] with r10 = middle_of_block
221 ldaex r2, [r10] ; stlex r9, r6, [r10] with r10 = middle_of_block
Dv8memory_a.stdout.exp159 clrex; stlex r9, r6, [r10] with r10 = middle_of_block
221 ldaex r2, [r10] ; stlex r9, r6, [r10] with r10 = middle_of_block
/external/vixl/src/aarch32/
Dassembler-aarch32.h3189 void stlex(Condition cond,
3193 void stlex(Register rd, Register rt, const MemOperand& operand) { in stlex() function
3194 stlex(al, rd, rt, operand); in stlex()
Ddisasm-aarch32.h1075 void stlex(Condition cond,
Dassembler-aarch32.cc9991 void Assembler::stlex(Condition cond, in stlex() function in vixl::aarch32::Assembler
10017 Delegate(kStlex, &Assembler::stlex, cond, rd, rt, operand); in stlex()
Ddisasm-aarch32.cc2958 void Disassembler::stlex(Condition cond, in stlex() function in vixl::aarch32::Disassembler
10118 stlex(CurrentCond(), in DecodeT32()
57983 stlex(condition, in DecodeA32()
Dmacro-assembler-aarch32.h4274 stlex(cond, rd, rt, operand); in Stlex()
/external/llvm/lib/Target/ARM/
DARMInstrThumb2.td3413 "stlex", "\t$Rd, $Rt, $addr", "",
DARMInstrInfo.td4742 NoItinerary, "stlex", "\t$Rd, $Rt, $addr",
/external/valgrind/
DNEWS421 356823 Unsupported ARM instruction: stlex
/external/swiftshader/third_party/llvm-subzero/build/Android/include/llvm/IR/
DIntrinsics.gen690 arm_stlex, // llvm.arm.stlex
6748 "llvm.arm.stlex",
14688 3, // llvm.arm.stlex
/external/swiftshader/third_party/llvm-subzero/build/MacOS/include/llvm/IR/
DIntrinsics.gen684 arm_stlex, // llvm.arm.stlex
6708 "llvm.arm.stlex",
14593 3, // llvm.arm.stlex
/external/swiftshader/third_party/llvm-subzero/build/Windows/include/llvm/IR/
DIntrinsics.gen690 arm_stlex, // llvm.arm.stlex
6748 "llvm.arm.stlex",
14688 3, // llvm.arm.stlex
/external/swiftshader/third_party/llvm-subzero/build/Linux/include/llvm/IR/
DIntrinsics.gen690 arm_stlex, // llvm.arm.stlex
6748 "llvm.arm.stlex",
14688 3, // llvm.arm.stlex