| /external/llvm/test/CodeGen/ARM/ |
| D | ldaex-stlex.ll | 21 ; CHECK: stlexd
27 %stlexd = tail call i32 @llvm.arm.stlexd(i32 %tmp4, i32 %tmp7, i8* %ptr)
28 ret i32 %stlexd
32 declare i32 @llvm.arm.stlexd(i32, i32, i8*) nounwind
|
| D | atomic-ops-v8.ll | 192 ; CHECK-NEXT: stlexd [[STATUS:r[0-9]+]], [[NEW1]], [[NEW2]], [r[[ADDR]]]
384 ; CHECK: stlexd [[STATUS:r[0-9]+]], [[NEW1]], [[NEW2]], [r[[ADDR]]]
681 ; CHECK-ARM: stlexd [[STATUS:r[0-9]+]], [[MINLO]], [[MINHI]], [r[[ADDR]]]
682 ; CHECK-THUMB: stlexd [[STATUS:r[0-9]+]], {{r[0-9]+}}, {{r[0-9]+}}, [r[[ADDR]]]
907 ; CHECK-ARM: stlexd [[STATUS:r[0-9]+]], [[MINLO]], [[MINHI]], [r[[ADDR]]]
908 ; CHECK-THUMB: stlexd [[STATUS:r[0-9]+]], {{r[0-9]+}}, {{r[0-9]+}}, [r[[ADDR]]]
1020 ; CHECK-ARM: stlexd [[STATUS:r[0-9]+]], [[MINLO]], [[MINHI]], [r[[ADDR]]]
1021 ; CHECK-THUMB: stlexd [[STATUS:r[0-9]+]], {{r[0-9]+}}, {{r[0-9]+}}, [r[[ADDR]]]
1391 ; CHECK: stlexd [[STATUS:r[0-9]+]], r0, r1, {{.*}}[[ADDR]]
|
| /external/llvm/test/MC/ARM/ |
| D | load-store-acquire-release-v8.s | 20 stlexd r6, r2, r3, [r8]
24 @ CHECK: stlexd r6, r2, r3, [r8] @ encoding: [0x92,0x6e,0xa8,0xe1]
|
| D | load-store-acquire-release-v8-thumb.s | 20 stlexd r6, r2, r3, [r8]
24 @ CHECK: stlexd r6, r2, r3, [r8] @ encoding: [0xc8,0xe8,0xf6,0x23]
|
| D | thumbv8m.s | 139 stlexd r0, r1, r2, [r2] label
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | load-store-acquire-release-v8.txt | 18 # CHECK: stlexd r6, r2, r3, [r8] @ encoding: [0x92,0x6e,0xa8,0xe1]
|
| D | load-store-acquire-release-v8-thumb.txt | 19 # CHECK: stlexd r6, r2, r3, [r8] @ encoding: [0xc8,0xe8,0xf6,0x23]
|
| /external/llvm/test/Transforms/AtomicExpand/ARM/ |
| D | atomic-expansion-v8.ll | 75 ; CHECK: [[TRYAGAIN:%.*]] = call i32 @llvm.arm.stlexd(i32 [[NEWLO]], i32 [[NEWHI]], i8* [[PTR8]])
|
| /external/valgrind/none/tests/arm/ |
| D | v8memory_t.stdout.exp | 204 clrex; stlexd r9, r2, r3, [r10] with r10 = middle_of_block
266 mov r4, r2 ; mov r5, r3 ; ldaexd r2, r3, [r10] ; mov r2, r4 ; mov r3, r5 ; stlexd r9, r2, r3, [r10]…
|
| D | v8memory_a.stdout.exp | 204 clrex; stlexd r9, r2, r3, [r10] with r10 = middle_of_block
266 mov r4, r2 ; mov r5, r3 ; ldaexd r2, r3, [r10] ; mov r2, r4 ; mov r3, r5 ; stlexd r9, r2, r3, [r10]…
|
| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 3205 void stlexd(Condition cond,
3210 void stlexd(Register rd, in stlexd() function
3214 stlexd(al, rd, rt, rt2, operand); in stlexd()
|
| D | disasm-aarch32.h | 1085 void stlexd(Condition cond,
|
| D | assembler-aarch32.cc | 10049 void Assembler::stlexd(Condition cond, in stlexd() function in vixl::aarch32::Assembler
10078 Delegate(kStlexd, &Assembler::stlexd, cond, rd, rt, rt2, operand); in stlexd()
|
| D | disasm-aarch32.cc | 2976 void Disassembler::stlexd(Condition cond, in stlexd() function in vixl::aarch32::Disassembler
10134 stlexd(CurrentCond(), in DecodeT32()
58107 stlexd(condition, in DecodeA32()
|
| D | macro-assembler-aarch32.h | 4310 stlexd(cond, rd, rt, rt2, operand); in Stlexd()
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 3431 "stlexd", "\t$Rd, $Rt, $Rt2, $addr", "", [],
|
| D | ARMInstrInfo.td | 4748 NoItinerary, "stlexd", "\t$Rd, $Rt, $addr", []> {
|
| /external/swiftshader/third_party/llvm-subzero/build/Android/include/llvm/IR/ |
| D | Intrinsics.gen | 691 arm_stlexd, // llvm.arm.stlexd
6749 "llvm.arm.stlexd",
14689 3, // llvm.arm.stlexd
|
| /external/swiftshader/third_party/llvm-subzero/build/MacOS/include/llvm/IR/ |
| D | Intrinsics.gen | 685 arm_stlexd, // llvm.arm.stlexd
6709 "llvm.arm.stlexd",
14594 3, // llvm.arm.stlexd
|
| /external/swiftshader/third_party/llvm-subzero/build/Windows/include/llvm/IR/ |
| D | Intrinsics.gen | 691 arm_stlexd, // llvm.arm.stlexd
6749 "llvm.arm.stlexd",
14689 3, // llvm.arm.stlexd
|
| /external/swiftshader/third_party/llvm-subzero/build/Linux/include/llvm/IR/ |
| D | Intrinsics.gen | 691 arm_stlexd, // llvm.arm.stlexd
6749 "llvm.arm.stlexd",
14689 3, // llvm.arm.stlexd
|