| /external/llvm/test/CodeGen/AArch64/ |
| D | arm64-atomic-128.ll | 29 ; CHECK: stlxp [[SCRATCH_RES:w[0-9]+]], [[SCRATCH_REGLO]], [[SCRATCH_REGHI]], [x0]
44 ; CHECK: stlxp [[SCRATCH_RES:w[0-9]+]], [[SCRATCH_REGLO]], [[SCRATCH_REGHI]], [x0]
59 ; CHECK: stlxp [[SCRATCH_RES:w[0-9]+]], [[SCRATCH_REGLO]], [[SCRATCH_REGHI]], [x0]
74 ; CHECK: stlxp [[SCRATCH_RES:w[0-9]+]], [[SCRATCH_REGLO]], [[SCRATCH_REGHI]], [x0]
95 ; CHECK: stlxp [[SCRATCH_RES:w[0-9]+]], [[SCRATCH_REGLO]], [[SCRATCH_REGHI]], [x0]
116 ; CHECK: stlxp [[SCRATCH_RES:w[0-9]+]], [[SCRATCH_REGLO]], [[SCRATCH_REGHI]], [x0]
137 ; CHECK: stlxp [[SCRATCH_RES:w[0-9]+]], [[SCRATCH_REGLO]], [[SCRATCH_REGHI]], [x0]
158 ; CHECK: stlxp [[SCRATCH_RES:w[0-9]+]], [[SCRATCH_REGLO]], [[SCRATCH_REGHI]], [x0]
194 ; CHECK: stlxp [[SUCCESS:w[0-9]+]], x0, x1, [x2]
206 ; CHECK: stlxp [[SUCCESS:w[0-9]+]], x0, x1, [x2]
|
| D | arm64-ldxr-stxr.ll | 160 ; CHECK: stlxp {{w[0-9]+}}, {{x[0-9]+}}, {{x[0-9]+}}, [x0]
165 %strexd = tail call i32 @llvm.aarch64.stlxp(i64 %tmp4, i64 %tmp7, i8* %ptr)
170 declare i32 @llvm.aarch64.stlxp(i64, i64, i8*) nounwind
|
| D | cmpxchg-O0.ll | 70 ; CHECK: stlxp [[STATUS:w[0-9]+]], x4, x5, [x0]
|
| /external/llvm/test/MC/AArch64/ |
| D | arm64-memory.s | 528 stlxp w1, x2, x6, [x1]
529 stlxp w1, w2, w6, [x1]
535 ; CHECK: stlxp w1, x2, x6, [x1] ; encoding: [0x22,0x98,0x21,0xc8]
536 ; CHECK: stlxp w1, w2, w6, [x1] ; encoding: [0x22,0x98,0x21,0x88]
|
| D | basic-a64-diagnostics.s | 1884 stlxp w5, x1, w4, [x5]
1889 stlxp w17, w6, x7, [x22]
|
| D | basic-a64-instructions.s | 2303 stlxp wzr, w22, w23, [x24]
2304 stlxp w25, x26, x27, [sp]
2331 stlxp wzr, w22, w23, [x24,#0]
|
| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | arm64-memory.txt | 516 # CHECK: stlxp w1, x2, x6, [x1]
517 # CHECK: stlxp w1, w2, w6, [x1]
|
| D | basic-a64-instructions.txt | 1977 #CHECK: stlxp w4, w5, w6, [sp]
1978 #CHECK: stlxp wzr, x6, x7, [x1]
|
| /external/vixl/ |
| D | README.md | 125 `stlxrh`, `stlxr`, `ldaxrb`, `ldaxrh`, `ldaxr`, `stlxp`, `ldaxp`, `stlrb`,
|
| /external/vixl/test/aarch64/ |
| D | test-disasm-aarch64.cc | 1826 COMPARE(stlxp(w27, w28, w29, MemOperand(x30)), "stlxp w27, w28, w29, [x30]"); in TEST()
1827 COMPARE(stlxp(x0, w1, w2, MemOperand(sp)), "stlxp w0, w1, w2, [sp]"); in TEST()
1828 COMPARE(stlxp(w3, x4, x5, MemOperand(x6)), "stlxp w3, x4, x5, [x6]"); in TEST()
1829 COMPARE(stlxp(x7, x8, x9, MemOperand(sp)), "stlxp w7, x8, x9, [sp]"); in TEST()
|
| D | test-trace-aarch64.cc | 296 __ stlxp(w24, w25, w26, MemOperand(x0)); in GenerateTestSequenceBase() local
297 __ stlxp(x27, x28, x29, MemOperand(x0)); in GenerateTestSequenceBase() local
|
| /external/vixl/src/aarch64/ |
| D | assembler-aarch64.h | 1149 void stlxp(const Register& rs,
|
| D | macro-assembler-aarch64.h | 1850 stlxp(rs, rt, rt2, dst); in Stlxp()
|
| D | assembler-aarch64.cc | 1332 void Assembler::stlxp(const Register& rs, in stlxp() function in vixl::aarch64::Assembler
|
| /external/vixl/test/test-trace-reference/ |
| D | log-disasm | 242 0x~~~~~~~~~~~~~~~~ 8838e819 stlxp w24, w25, w26, [x0]
243 0x~~~~~~~~~~~~~~~~ c83bf41c stlxp w27, x28, x29, [x0]
|
| D | log-disasm-colour | 242 0x~~~~~~~~~~~~~~~~ 8838e819 stlxp w24, w25, w26, [x0]
243 0x~~~~~~~~~~~~~~~~ c83bf41c stlxp w27, x28, x29, [x0]
|
| D | log-all | 594 0x~~~~~~~~~~~~~~~~ 8838e819 stlxp w24, w25, w26, [x0]
596 0x~~~~~~~~~~~~~~~~ c83bf41c stlxp w27, x28, x29, [x0]
|
| /external/vixl/doc/aarch64/ |
| D | supported-instructions-aarch64.md | 1103 void stlxp(const Register& rs,
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.td | 2469 def STLXPW : StoreExclusivePair<0b10, 0, 0, 1, 1, GPR32, "stlxp">;
2470 def STLXPX : StoreExclusivePair<0b11, 0, 0, 1, 1, GPR64, "stlxp">;
|
| /external/swiftshader/third_party/llvm-subzero/build/Android/include/llvm/IR/ |
| D | Intrinsics.gen | 347 aarch64_stlxp, // llvm.aarch64.stlxp
6405 "llvm.aarch64.stlxp",
14345 3, // llvm.aarch64.stlxp
|
| /external/swiftshader/third_party/llvm-subzero/build/MacOS/include/llvm/IR/ |
| D | Intrinsics.gen | 338 aarch64_stlxp, // llvm.aarch64.stlxp
6362 "llvm.aarch64.stlxp",
14247 3, // llvm.aarch64.stlxp
|
| /external/swiftshader/third_party/llvm-subzero/build/Windows/include/llvm/IR/ |
| D | Intrinsics.gen | 347 aarch64_stlxp, // llvm.aarch64.stlxp
6405 "llvm.aarch64.stlxp",
14345 3, // llvm.aarch64.stlxp
|
| /external/swiftshader/third_party/llvm-subzero/build/Linux/include/llvm/IR/ |
| D | Intrinsics.gen | 347 aarch64_stlxp, // llvm.aarch64.stlxp
6405 "llvm.aarch64.stlxp",
14345 3, // llvm.aarch64.stlxp
|