| /external/llvm/test/CodeGen/AArch64/ |
| D | arm64-vsub.ll | 5 ;CHECK: subhn.8b
8 %tmp3 = call <8 x i8> @llvm.aarch64.neon.subhn.v8i8(<8 x i16> %tmp1, <8 x i16> %tmp2)
14 ;CHECK: subhn.4h
17 %tmp3 = call <4 x i16> @llvm.aarch64.neon.subhn.v4i16(<4 x i32> %tmp1, <4 x i32> %tmp2)
23 ;CHECK: subhn.2s
26 %tmp3 = call <2 x i32> @llvm.aarch64.neon.subhn.v2i32(<2 x i64> %tmp1, <2 x i64> %tmp2)
32 ;CHECK: subhn.8b
34 %vsubhn2.i = tail call <8 x i8> @llvm.aarch64.neon.subhn.v8i8(<8 x i16> %a, <8 x i16> %b) nounwind
35 …%vsubhn_high2.i = tail call <8 x i8> @llvm.aarch64.neon.subhn.v8i8(<8 x i16> %a, <8 x i16> %b) nou…
42 ;CHECK: subhn.4h
[all …]
|
| D | arm64-vadd.ll | 876 ;CHECK: subhn.8b
887 ;CHECK: subhn.4h
898 ;CHECK: subhn.2s
|
| D | arm64-neon-3vdiff.ll | 811 ; CHECK: subhn {{v[0-9]+}}.8b, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
821 ; CHECK: subhn {{v[0-9]+}}.4h, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
831 ; CHECK: subhn {{v[0-9]+}}.2s, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
841 ; CHECK: subhn {{v[0-9]+}}.8b, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
851 ; CHECK: subhn {{v[0-9]+}}.4h, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
861 ; CHECK: subhn {{v[0-9]+}}.2s, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
|
| /external/valgrind/none/tests/arm64/ |
| D | fp_and_simd.c | 2722 GEN_BINARY_TEST(subhn, 2s, 2d, 2d)
2724 GEN_BINARY_TEST(subhn, 4h, 4s, 4s)
2726 GEN_BINARY_TEST(subhn, 8b, 8h, 8h)
|
| D | fp_and_simd.stdout.exp | 26953 subhn v9.2s, v7.2d, v8.2d 770ae1e5aeefe6d6c7f9e416321beb52 86ea94dee9e1b968dcb4639e9c502b51 0000…
26955 subhn v9.4h, v7.4s, v8.4s fe44f317ecb1f9c87aa050364ebba8c8 0c2ed4b510f0915327404e40867e04c7 0000…
26957 subhn v9.8b, v7.8h, v8.8h 104f1ec3caa4b8807ad2d4a080b53fc6 b17155040e7edc2397c3b66bfa95bd22 0000…
|
| /external/vixl/test/aarch64/ |
| D | test-trace-aarch64.cc | 2113 __ subhn(v5.V2S(), v14.V2D(), v13.V2D()); in GenerateTestSequenceNEON() local
2114 __ subhn(v10.V4H(), v5.V4S(), v8.V4S()); in GenerateTestSequenceNEON() local
2115 __ subhn(v6.V8B(), v10.V8H(), v22.V8H()); in GenerateTestSequenceNEON() local
|
| D | test-simulator-aarch64.cc | 4194 DEFINE_TEST_NEON_3DIFF_NARROW(subhn, Basic)
|
| /external/vixl/test/test-trace-reference/ |
| D | log-disasm | 1775 0x~~~~~~~~~~~~~~~~ 0ead61c5 subhn v5.2s, v14.2d, v13.2d
1776 0x~~~~~~~~~~~~~~~~ 0e6860aa subhn v10.4h, v5.4s, v8.4s
1777 0x~~~~~~~~~~~~~~~~ 0e366146 subhn v6.8b, v10.8h, v22.8h
|
| D | log-disasm-colour | 1775 0x~~~~~~~~~~~~~~~~ 0ead61c5 subhn v5.2s, v14.2d, v13.2d
1776 0x~~~~~~~~~~~~~~~~ 0e6860aa subhn v10.4h, v5.4s, v8.4s
1777 0x~~~~~~~~~~~~~~~~ 0e366146 subhn v6.8b, v10.8h, v22.8h
|
| D | log-all | 4853 0x~~~~~~~~~~~~~~~~ 0ead61c5 subhn v5.2s, v14.2d, v13.2d
4855 0x~~~~~~~~~~~~~~~~ 0e6860aa subhn v10.4h, v5.4s, v8.4s
4857 0x~~~~~~~~~~~~~~~~ 0e366146 subhn v6.8b, v10.8h, v22.8h
|
| /external/vixl/src/aarch64/ |
| D | assembler-aarch64.h | 2445 void subhn(const VRegister& vd, const VRegister& vn, const VRegister& vm);
|
| D | simulator-aarch64.h | 2664 V(subhn) \
|
| D | macro-assembler-aarch64.h | 2209 V(subhn, Subhn) \
|
| D | simulator-aarch64.cc | 3664 subhn(vf, rd, rn, rm); in VisitNEON3Different()
|
| D | logic-aarch64.cc | 3409 LogicVRegister Simulator::subhn(VectorFormat vform, in subhn() function in vixl::aarch64::Simulator
|
| D | assembler-aarch64.cc | 1952 V(subhn, NEON_SUBHN, vd.IsD()) \
|
| /external/vixl/doc/aarch64/ |
| D | supported-instructions-aarch64.md | 3892 void subhn(const VRegister& vd,
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.td | 3534 defm SUBHN : SIMDNarrowThreeVectorBHS<0,0b0110,"subhn", int_aarch64_neon_subhn>;
3624 // CodeGen patterns for addhn and subhn instructions, which can actually be
|
| /external/swiftshader/third_party/llvm-subzero/build/Android/include/llvm/IR/ |
| D | Intrinsics.gen | 297 aarch64_neon_subhn, // llvm.aarch64.neon.subhn
6355 "llvm.aarch64.neon.subhn",
14295 1, // llvm.aarch64.neon.subhn
|
| /external/swiftshader/third_party/llvm-subzero/build/MacOS/include/llvm/IR/ |
| D | Intrinsics.gen | 289 aarch64_neon_subhn, // llvm.aarch64.neon.subhn
6313 "llvm.aarch64.neon.subhn",
14198 1, // llvm.aarch64.neon.subhn
|
| /external/swiftshader/third_party/llvm-subzero/build/Windows/include/llvm/IR/ |
| D | Intrinsics.gen | 297 aarch64_neon_subhn, // llvm.aarch64.neon.subhn
6355 "llvm.aarch64.neon.subhn",
14295 1, // llvm.aarch64.neon.subhn
|
| /external/swiftshader/third_party/llvm-subzero/build/Linux/include/llvm/IR/ |
| D | Intrinsics.gen | 297 aarch64_neon_subhn, // llvm.aarch64.neon.subhn
6355 "llvm.aarch64.neon.subhn",
14295 1, // llvm.aarch64.neon.subhn
|