Searched refs:surflevel (Results 1 – 3 of 3) sorted by relevance
171 struct radeon_surface_level *surflevel, in surf_minify() argument176 surflevel->npix_x = mip_minify(surf->npix_x, level); in surf_minify()177 surflevel->npix_y = mip_minify(surf->npix_y, level); in surf_minify()178 surflevel->npix_z = mip_minify(surf->npix_z, level); in surf_minify()179 surflevel->nblk_x = (surflevel->npix_x + surf->blk_w - 1) / surf->blk_w; in surf_minify()180 surflevel->nblk_y = (surflevel->npix_y + surf->blk_h - 1) / surf->blk_h; in surf_minify()181 surflevel->nblk_z = (surflevel->npix_z + surf->blk_d - 1) / surf->blk_d; in surf_minify()182 if (surf->nsamples == 1 && surflevel->mode == RADEON_SURF_MODE_2D && in surf_minify()184 if (surflevel->nblk_x < xalign || surflevel->nblk_y < yalign) { in surf_minify()185 surflevel->mode = RADEON_SURF_MODE_1D; in surf_minify()[all …]
672 struct radeon_surf_level *surflevel; in evergreen_create_sampler_view_custom() local698 surflevel = tmp->surface.level; in evergreen_create_sampler_view_custom()718 surflevel = tmp->surface.stencil_level; in evergreen_create_sampler_view_custom()754 pitch = surflevel[base_level].nblk_x * util_format_get_blockwidth(pipe_format); in evergreen_create_sampler_view_custom()757 switch (surflevel[base_level].mode) { in evergreen_create_sampler_view_custom()818 view->tex_resource_words[2] = (surflevel[base_level].offset + va) >> 8; in evergreen_create_sampler_view_custom()831 view->tex_resource_words[3] = (surflevel[1].offset + va) >> 8; in evergreen_create_sampler_view_custom()833 view->tex_resource_words[3] = (surflevel[base_level].offset + va) >> 8; in evergreen_create_sampler_view_custom()
3040 const struct radeon_surf_level *surflevel; in si_create_sampler_view_custom() local3124 surflevel = tmp->surface.level; in si_create_sampler_view_custom()3145 surflevel = tmp->surface.stencil_level; in si_create_sampler_view_custom()3162 view->base_level_info = &surflevel[base_level]; in si_create_sampler_view_custom()