/external/compiler-rt/test/tsan/ |
D | unaligned_race.cc | 49 static NOINLINE void access3(bool main, int sz1, bool rw, volatile char *p) { in access3() argument 52 access(p, sz1, true); in access3() 66 access2(bool main, int sz1, int off2, bool rw, volatile char *obj) { in access2() argument 68 access3<off, 0>(main, sz1, rw, obj); in access2() 70 access3<off, 1>(main, sz1, rw, obj); in access2() 72 access3<off, 2>(main, sz1, rw, obj); in access2() 74 access3<off, 3>(main, sz1, rw, obj); in access2() 76 access3<off, 4>(main, sz1, rw, obj); in access2() 78 access3<off, 5>(main, sz1, rw, obj); in access2() 80 access3<off, 6>(main, sz1, rw, obj); in access2() [all …]
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D | unaligned_norace.cc | 48 for (int sz1 = 0; sz1 < 3; sz1++) { in Test() local 55 access(p, sz1, true); in Test() 57 p += accesssize(sz1); in Test()
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/external/compiler-rt/test/asan/TestCases/ |
D | coverage-pc-buffer.cc | 36 uintptr_t sz1 = __sanitizer_get_coverage_pc_buffer(&buf1); in main() local 37 assertNotZeroPcs(buf1, sz1); in main() 39 assert(sz1 > sz); in main() 48 uintptr_t sz1 = __sanitizer_get_coverage_pc_buffer(&buf1); in main() local 49 assertNotZeroPcs(buf1, sz1); in main() 51 assert(sz1 == sz); in main() 60 uintptr_t sz1 = __sanitizer_get_coverage_pc_buffer(&buf1); in main() local 61 assertNotZeroPcs(buf1, sz1); in main() 63 assert(sz1 < sz); in main()
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/external/libvpx/libvpx/vp8/encoder/x86/ |
D | vp8_quantize_sse2.c | 40 __m128i sz0, x0, sz1, x1, y0, y1, x_minus_zbin0, x_minus_zbin1; in vp8_regular_quantize_b_sse2() local 63 sz1 = _mm_srai_epi16(z1, 15); in vp8_regular_quantize_b_sse2() 67 x1 = _mm_xor_si128(z1, sz1); in vp8_regular_quantize_b_sse2() 69 x1 = _mm_sub_epi16(x1, sz1); in vp8_regular_quantize_b_sse2() 102 y1 = _mm_xor_si128(y1, sz1); in vp8_regular_quantize_b_sse2() 104 y1 = _mm_sub_epi16(y1, sz1); in vp8_regular_quantize_b_sse2() 156 __m128i sz0, sz1, x0, x1, y0, y1, xdq0, xdq1, zeros, ones; in vp8_fast_quantize_b_sse2() local 160 sz1 = _mm_srai_epi16(z1, 15); in vp8_fast_quantize_b_sse2() 164 x1 = _mm_xor_si128(z1, sz1); in vp8_fast_quantize_b_sse2() 166 x1 = _mm_sub_epi16(x1, sz1); in vp8_fast_quantize_b_sse2() [all …]
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D | quantize_sse4.c | 34 __m128i sz0, x0, sz1, x1, y0, y1, x_minus_zbin0, x_minus_zbin1, dqcoeff0, in vp8_regular_quantize_b_sse4_1() local 58 sz1 = _mm_srai_epi16(z1, 15); in vp8_regular_quantize_b_sse4_1() 62 x1 = _mm_xor_si128(z1, sz1); in vp8_regular_quantize_b_sse4_1() 64 x1 = _mm_sub_epi16(x1, sz1); in vp8_regular_quantize_b_sse4_1() 94 y1 = _mm_xor_si128(y1, sz1); in vp8_regular_quantize_b_sse4_1() 96 y1 = _mm_sub_epi16(y1, sz1); in vp8_regular_quantize_b_sse4_1()
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D | quantize_ssse3.c | 52 __m128i sz0, sz1, x, x0, x1, y0, y1, zeros, abs0, abs1; in vp8_fast_quantize_b_ssse3() local 61 sz1 = _mm_srai_epi16(z1, 15); in vp8_fast_quantize_b_ssse3() 83 y1 = _mm_xor_si128(y1, sz1); in vp8_fast_quantize_b_ssse3() 85 x1 = _mm_sub_epi16(y1, sz1); in vp8_fast_quantize_b_ssse3()
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/external/libvpx/libvpx/vp8/encoder/arm/neon/ |
D | fastquantizeb_neon.c | 27 int16x8_t x0, x1, sz0, sz1, y0, y1; in vp8_fast_quantize_b_neon() local 35 sz1 = vshrq_n_s16(z1, 15); in vp8_fast_quantize_b_neon() 55 y1 = veorq_s16(y1, sz1); in vp8_fast_quantize_b_neon() 57 x1 = vsubq_s16(y1, sz1); in vp8_fast_quantize_b_neon()
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/external/clang/test/CodeGenOpenCL/ |
D | vla.cl | 5 const global int sz1 = 16; 6 // CHECK: @sz1 = addrspace(1) constant i32 16 15 char vla1[sz1];
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/external/jemalloc/msvc/projects/vc2015/test_threads/ |
D | test_threads.cpp | 35 size_t sz1 = sizeof(allocated1); in test_threads() local 36 je_mallctl("stats.active", (void *)&allocated1, &sz1, NULL, 0); in test_threads() 81 je_mallctl("stats.active", (void *)&allocated2, &sz1, NULL, 0); in test_threads()
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/external/valgrind/VEX/priv/ |
D | host_arm_defs.c | 4204 UInt sz1 = i->ARMin.NUnary.size >> 1; in emit_ARMInstr() local 4226 insn = XXXXXXXX(0xF, X0011, BITS4(1,D,1,1), BITS4(sz1,sz2,1,0), in emit_ARMInstr() 4230 insn = XXXXXXXX(0xF, X0011, BITS4(1,D,1,1), BITS4(sz1,sz2,1,0), in emit_ARMInstr() 4234 insn = XXXXXXXX(0xF, X0011, BITS4(1,D,1,1), BITS4(sz1,sz2,1,0), in emit_ARMInstr() 4238 insn = XXXXXXXX(0xF, X0011, BITS4(1,D,1,1), BITS4(sz1,sz2,1,0), in emit_ARMInstr() 4262 insn = XXXXXXXX(0xF, X0011, BITS4(1,D,1,1), BITS4(sz1,sz2,0,1), in emit_ARMInstr() 4270 insn = XXXXXXXX(0xF, X0011, BITS4(1,D,1,1), BITS4(sz1,sz2,0,0), in emit_ARMInstr() 4274 insn = XXXXXXXX(0xF, X0011, BITS4(1,D,1,1), BITS4(sz1,sz2,0,0), in emit_ARMInstr() 4278 insn = XXXXXXXX(0xF, X0011, BITS4(1,D,1,1), BITS4(sz1,sz2,0,1), in emit_ARMInstr() 4282 sz1 = i->ARMin.NUnary.size == 0 ? 1 : 0; in emit_ARMInstr() [all …]
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/external/hyphenation-patterns/hu/ |
D | hyph-hu.pat.txt | 112 .ász1ál 113 .ász1árb 114 .ász1á2ré 115 .ász1á2ri 116 .ász1á2ro 424 .ész1á 429 .ész1é2k 432 .ész1ő2 435 .ész1ülő 885 .ősz1á [all …]
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/external/vulkan-validation-layers/libs/glm/gtc/ |
D | noise.inl | 125 detail::tvec4<T, P> sz1 = step(gz1, detail::tvec4<T, P>(0.0)); local 126 gx1 -= sz1 * (step(T(0), gx1) - T(0.5)); 127 gy1 -= sz1 * (step(T(0), gy1) - T(0.5)); 196 detail::tvec4<T, P> sz1 = step(gz1, detail::tvec4<T, P>(0.0)); 197 gx1 -= sz1 * (step(T(0), gx1) - T(0.5)); 198 gy1 -= sz1 * (step(T(0), gy1) - T(0.5)); 447 detail::tvec4<T, P> sz1 = step(gz1, detail::tvec4<T, P>(T(0))); local 448 gx1 -= sz1 * (step(T(0), gx1) - T(0.5)); 449 gy1 -= sz1 * (step(T(0), gy1) - T(0.5));
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/external/llvm/lib/Target/AArch64/ |
D | AArch64InstrFormats.td | 6067 multiclass SIMDFPAcrossLanes<bits<5> opcode, bit sz1, string asm, 6070 def v4i16v : BaseSIMDAcrossLanes<0, 0, {sz1, 0}, opcode, FPR16, V64, 6073 def v8i16v : BaseSIMDAcrossLanes<1, 0, {sz1, 0}, opcode, FPR16, V128, 6077 def v4i32v : BaseSIMDAcrossLanes<1, 1, {sz1, 0}, opcode, FPR32, V128,
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