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/external/valgrind/none/tests/mips32/
Dmips32_dsp.c560 TESTDSPINST_RD_RT_DSPC("absq_s.ph $t6, $t7", 0x73468000, t6, t7); in main()
568 TESTDSPINST_RD_RT_DSPC("absq_s.ph $t6, $t7", 0xf973437b, t6, t7); in main()
576 TESTDSPINST_RD_RT_DSPC("absq_s.ph $t6, $t7", 0x0b300286, t6, t7); in main()
584 TESTDSPINST_RD_RT_DSPC("absq_s.ph $t6, $t7", 0xfabfabfa, t6, t7); in main()
592 TESTDSPINST_RD_RT_DSPC("absq_s.ph $t6, $t7", 0x7b11bee7, t6, t7); in main()
600 TESTDSPINST_RD_RT_DSPC("absq_s.ph $t6, $t7", -237, t6, t7); in main()
606 TESTDSPINST_RD_RT_DSPC("absq_s.w $t6, $t7", 0x73468000, t6, t7); in main()
614 TESTDSPINST_RD_RT_DSPC("absq_s.w $t6, $t7", 0xf973437b, t6, t7); in main()
622 TESTDSPINST_RD_RT_DSPC("absq_s.w $t6, $t7", 0x0b300286, t6, t7); in main()
630 TESTDSPINST_RD_RT_DSPC("absq_s.w $t6, $t7", 0xfabfabfa, t6, t7); in main()
[all …]
Dmips32_dspr2.c553 TESTDSPINST_RD_RT_DSPC("absq_s.qb $t6, $t7", 0x734680bc, t6, t7); in main()
561 TESTDSPINST_RD_RT_DSPC("absq_s.qb $t6, $t7", 0xf973437b, t6, t7); in main()
569 TESTDSPINST_RD_RT_DSPC("absq_s.qb $t6, $t7", 0x00000286, t6, t7); in main()
577 TESTDSPINST_RD_RT_DSPC("absq_s.qb $t6, $t7", 0xfabfabfa, t6, t7); in main()
585 TESTDSPINST_RD_RT_DSPC("absq_s.qb $t6, $t7", 0x7b11bee7, t6, t7); in main()
599 t6, t7, t3); in main()
607 t4, t6, t1); in main()
613 t6, t7, t3); in main()
621 t4, t6, t1); in main()
629 t6, t7, t3); in main()
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Dbranches.c292 TESTINST1(12, t6); in main()
318 TESTINST2(12, t6); in main()
344 TESTINST3(12, t6); in main()
368 TESTINST4("beq", 10, 0xffffffff, 0x80000000, t4, t5, t6); in main()
369 TESTINST4("beq", 11, 0x256, 0x256, t5, t6, t7); in main()
370 TESTINST4("beq", 12, 0x55, 0x55, t6, t7, s0); in main()
386 TESTINST4("bne", 10, 0xffffffff, 0x80000000, t4, t5, t6); in main()
387 TESTINST4("bne", 11, 0x256, 0x256, t5, t6, t7); in main()
388 TESTINST4("bne", 12, 0x55, 0x55, t6, t7, s0); in main()
405 TESTINST5("beqz", 11, 0x256, t5, t6); in main()
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Dmips32_dsp.stdout.exp-BE5 absq_s.ph $t6, $t7 :: rd 0x73467fff rt 0x73468000 DSPControl 0x100000
13 absq_s.ph $t6, $t7 :: rd 0x068d437b rt 0xf973437b DSPControl 0x0
21 absq_s.ph $t6, $t7 :: rd 0x0b300286 rt 0x0b300286 DSPControl 0x0
29 absq_s.ph $t6, $t7 :: rd 0x05415406 rt 0xfabfabfa DSPControl 0x0
37 absq_s.ph $t6, $t7 :: rd 0x7b114119 rt 0x7b11bee7 DSPControl 0x0
45 absq_s.ph $t6, $t7 :: rd 0x000100ed rt 0xffffff13 DSPControl 0x0
50 absq_s.w $t6, $t7 :: rd 0x73468000 rt 0x73468000 DSPControl 0x0
58 absq_s.w $t6, $t7 :: rd 0x068cbc85 rt 0xf973437b DSPControl 0x0
66 absq_s.w $t6, $t7 :: rd 0x0b300286 rt 0x0b300286 DSPControl 0x0
74 absq_s.w $t6, $t7 :: rd 0x05405406 rt 0xfabfabfa DSPControl 0x0
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Dmips32_dsp.stdout.exp-LE5 absq_s.ph $t6, $t7 :: rd 0x73467fff rt 0x73468000 DSPControl 0x100000
13 absq_s.ph $t6, $t7 :: rd 0x068d437b rt 0xf973437b DSPControl 0x0
21 absq_s.ph $t6, $t7 :: rd 0x0b300286 rt 0x0b300286 DSPControl 0x0
29 absq_s.ph $t6, $t7 :: rd 0x05415406 rt 0xfabfabfa DSPControl 0x0
37 absq_s.ph $t6, $t7 :: rd 0x7b114119 rt 0x7b11bee7 DSPControl 0x0
45 absq_s.ph $t6, $t7 :: rd 0x000100ed rt 0xffffff13 DSPControl 0x0
50 absq_s.w $t6, $t7 :: rd 0x73468000 rt 0x73468000 DSPControl 0x0
58 absq_s.w $t6, $t7 :: rd 0x068cbc85 rt 0xf973437b DSPControl 0x0
66 absq_s.w $t6, $t7 :: rd 0x0b300286 rt 0x0b300286 DSPControl 0x0
74 absq_s.w $t6, $t7 :: rd 0x05405406 rt 0xfabfabfa DSPControl 0x0
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/external/libjpeg-turbo/simd/
Djsimd_mips_dspr2.S60 addu t6, t5, t0
65 bne t6, t5, 2b
102 addu t6, t5, t0
180 lw t6, 0(a1) // t6 = input_buf[0]
193 DO_RGB_TO_YCC t3, t4, t5, t6
281 li t6, 0xffff492e // -FIX(0.71414)
307 mul t0, t6, s7 // Crgtab[cr]
421 extr.w t6, $ac0, 16
436 sb t6, 0(t1)
456 extr.w t6, $ac0, 16
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/external/speex/libspeex/
Dsmallft.c119 int t0,t1,t2,t3,t4,t5,t6; in dradf2() local
140 t6=t1+t1; in dradf2()
145 t6+=2; in dradf2()
148 ch[t6]=cc[t5]+ti2; in dradf2()
150 ch[t6-1]=cc[t5-1]+tr2; in dradf2()
174 int i,k,t0,t1,t2,t3,t4,t5,t6; in dradf4() local
206 t5=(t6=ido<<1)+t4; in dradf4()
238 ch[t4+t6-1]=ti4+tr3; in dradf4()
239 ch[t4+t6]=tr4+ti3; in dradf4()
241 ch[t5+t6-1]=tr2-tr1; in dradf4()
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/external/swiftshader/third_party/LLVM/test/CodeGen/X86/
Dmasked-iv-unsafe.ll25 %t6 = getelementptr double* %d, i64 %indvar
26 %t7 = load double* %t6
28 store double %t8, double* %t6
53 %t6 = getelementptr double* %d, i64 %indvar
54 %t7 = load double* %t6
56 store double %t8, double* %t6
83 %t6 = getelementptr double* %d, i64 %indvar
84 %t7 = load double* %t6
86 store double %t8, double* %t6
113 %t6 = getelementptr double* %d, i64 %indvar
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Dmasked-iv-safe.ll30 %t6 = getelementptr double* %d, i64 %indvar
31 %t7 = load double* %t6
33 store double %t8, double* %t6
58 %t6 = getelementptr double* %d, i64 %indvar
59 %t7 = load double* %t6
61 store double %t8, double* %t6
88 %t6 = getelementptr double* %d, i64 %indvar
89 %t7 = load double* %t6
91 store double %t8, double* %t6
118 %t6 = getelementptr double* %d, i64 %indvar
[all …]
/external/llvm/test/CodeGen/X86/
Dmasked-iv-unsafe.ll25 %t6 = getelementptr double, double* %d, i64 %indvar
26 %t7 = load double, double* %t6
28 store double %t8, double* %t6
53 %t6 = getelementptr double, double* %d, i64 %indvar
54 %t7 = load double, double* %t6
56 store double %t8, double* %t6
83 %t6 = getelementptr double, double* %d, i64 %indvar
84 %t7 = load double, double* %t6
86 store double %t8, double* %t6
113 %t6 = getelementptr double, double* %d, i64 %indvar
[all …]
Dmasked-iv-safe.ll27 %t6 = getelementptr double, double* %d, i64 %indvar
28 %t7 = load double, double* %t6
30 store double %t8, double* %t6
60 %t6 = getelementptr double, double* %d, i64 %indvar
61 %t7 = load double, double* %t6
63 store double %t8, double* %t6
95 %t6 = getelementptr double, double* %d, i64 %indvar
96 %t7 = load double, double* %t6
98 store double %t8, double* %t6
130 %t6 = getelementptr double, double* %d, i64 %indvar
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/external/python/cpython2/Modules/_ctypes/libffi/src/mips/
Dn32.S98 REG_L t6, 2*FFI_SIZEOF_ARG($fp)
101 daddiu t8, t6, -(8 * FFI_SIZEOF_ARG)
108 REG_L t6, 3*FFI_SIZEOF_ARG($fp) # load the flags word into t6.
110 and t4, t6, ((1<<FFI_FLAG_BITS)-1)
120 SRL t4, t6, 1*FFI_FLAG_BITS
131 SRL t4, t6, 2*FFI_FLAG_BITS
142 SRL t4, t6, 3*FFI_FLAG_BITS
153 SRL t4, t6, 4*FFI_FLAG_BITS
164 SRL t4, t6, 5*FFI_FLAG_BITS
175 SRL t4, t6, 6*FFI_FLAG_BITS
[all …]
/external/selinux/secilc/test/
Dneverallow.cil39 (type t6)
53 (typeattributeset a5 (t5 t6))
54 (typeattributeset a6 (t6 t7))
62 (neverallow t5 t6 cp1)
63 (allow t5 t6 (c1 (p1b)))
64 (allow t5 t6 (c2 (p2a)))
74 (allow t6 self (CLASS (PERM)))
79 (allow t5 t6 (c2 (p2b)))
Dblock_test.cil97 (type t6)
100 (allow t6 self (CLASS (PERM1)))
103 (allow t6 self (CLASS (PERM)))
117 ;; t6
126 ;; allow t6 t6 : CLASS { PERM };
/external/llvm/test/MC/COFF/
Dcross-section-relative.s52 .globl t6 # @t6 symbol
54 t6: label
58 .long g3-(t6+16)
/external/llvm/test/Transforms/InstCombine/
Dsigned-comparison.ll12 %t6 = icmp slt i32 %t5, 500
13 ret i1 %t6
22 %t6 = icmp slt <4 x i32> %t5, <i32 500, i32 0, i32 501, i32 65535>
23 ret <4 x i1> %t6
/external/valgrind/memcheck/tests/
Dorigin3-no.stderr.exp52 at 0x........: t6 (origin3-no.c:107)
55 at 0x........: t6 (origin3-no.c:104)
61 at 0x........: t6 (origin3-no.c:109)
64 at 0x........: t6 (origin3-no.c:105)
70 at 0x........: t6 (origin3-no.c:111)
73 at 0x........: t6 (origin3-no.c:105)
Dorigin3-no.c22 __attribute__((noinline)) int t6(void);
33 x += t6(); in main()
87 __attribute__((noinline)) int t6(void) in t6() function
/external/llvm/test/Transforms/IndVarSimplify/
Deliminate-rem.ll19 %t6 = phi i64 [ %t9, %bb5 ], [ 0, %bb4 ] ; <i64> [#uses=2]
20 %t7 = srem i64 %t6, %arg ; <i64> [#uses=1]
23 %t9 = add nsw i64 %t6, 1 ; <i64> [#uses=2]
50 %t6 = phi i64 [ %t51, %bb49 ], [ 0, %bb4 ] ; <i64> [#uses=4]
52 %t8 = add nsw i64 %t6, %arg1 ; <i64> [#uses=1]
56 %t12 = add nsw i64 %t6, 1 ; <i64> [#uses=1]
76 %t24 = mul i64 %t6, %arg1 ; <i64> [#uses=1]
111 %t51 = add nsw i64 %t6, 1 ; <i64> [#uses=2]
/external/swiftshader/third_party/LLVM/test/Transforms/IndVarSimplify/
Deliminate-rem.ll19 %t6 = phi i64 [ %t9, %bb5 ], [ 0, %bb4 ] ; <i64> [#uses=2]
20 %t7 = srem i64 %t6, %arg ; <i64> [#uses=1]
23 %t9 = add nsw i64 %t6, 1 ; <i64> [#uses=2]
50 %t6 = phi i64 [ %t51, %bb49 ], [ 0, %bb4 ] ; <i64> [#uses=4]
52 %t8 = add nsw i64 %t6, %arg1 ; <i64> [#uses=1]
56 %t12 = add nsw i64 %t6, 1 ; <i64> [#uses=1]
76 %t24 = mul i64 %t6, %arg1 ; <i64> [#uses=1]
111 %t51 = add nsw i64 %t6, 1 ; <i64> [#uses=2]
/external/openssh/regress/
DMakefile3 REGRESS_TARGETS= unit t1 t2 t3 t4 t5 t6 t7 t8 t9 t10 t11 t12 t-exec
114 t6.out1 t6.out2 t7.out t7.out.pub t8.out t8.out.pub \
150 t6: target
151 ${TEST_SSH_SSHKEYGEN} -if ${.CURDIR}/dsa_ssh2.prv > $(OBJ)/t6.out1
152 ${TEST_SSH_SSHKEYGEN} -if ${.CURDIR}/dsa_ssh2.pub > $(OBJ)/t6.out2
153 chmod 600 $(OBJ)/t6.out1
154 ${TEST_SSH_SSHKEYGEN} -yf $(OBJ)/t6.out1 | diff - $(OBJ)/t6.out2
/external/llvm/test/Transforms/LoopStrengthReduce/
Daddress-space-loop.ll3 ; LSR shouldn't consider %t8 to be an interesting user of %t6, and it
39 ; CHECK-NEXT: %t6 = load float addrspace(1)*, float addrspace(1)* addrspace(1)* undef
41 ; CHECK-NEXT: [[SCEVGEP1:%[^ ]+]] = getelementptr float, float addrspace(1)* %t6, i16 4
50 %t6 = load float addrspace(1)*, float addrspace(1)* addrspace(1)* undef
51 %t8 = bitcast float addrspace(1)* %t6 to i8 addrspace(1)* ; <i8*> [#uses=1]
Duglygep-address-space.ll3 ; LSR shouldn't consider %t8 to be an interesting user of %t6, and it
39 ; CHECK-NEXT: %t6 = load float addrspace(1)*, float addrspace(1)* addrspace(1)* undef
41 ; CHECK-NEXT: [[SCEVGEP1:%[^ ]+]] = getelementptr float, float addrspace(1)* %t6, i16 4
50 %t6 = load float addrspace(1)*, float addrspace(1)* addrspace(1)* undef
51 %t8 = bitcast float addrspace(1)* %t6 to i8 addrspace(1)* ; <i8*> [#uses=1]
/external/clang/test/CXX/except/except.spec/
Dp5-pointers.cpp58 void (*t6)() throw(B1); in fnptrs()
59t6 = t4; // expected-error {{not superset}} expected-error {{incompatible ty… in fnptrs()
60 t4 = t6; // valid in fnptrs()
/external/libvpx/libvpx/vpx_dsp/arm/
Dvpx_convolve8_neon.c226 uint8x8_t t4, t5, t6, t7; in vpx_convolve8_horiz_neon() local
231 load_8x8(src, src_stride, &t0, &t1, &t2, &t3, &t4, &t5, &t6, &t7); in vpx_convolve8_horiz_neon()
232 transpose_u8_8x8(&t0, &t1, &t2, &t3, &t4, &t5, &t6, &t7); in vpx_convolve8_horiz_neon()
239 s6 = vreinterpretq_s16_u16(vmovl_u8(t6)); in vpx_convolve8_horiz_neon()
241 load_8x8(src + 7, src_stride, &t0, &t1, &t2, &t3, &t4, &t5, &t6, &t7); in vpx_convolve8_horiz_neon()
251 transpose_u8_8x8(&t0, &t1, &t2, &t3, &t4, &t5, &t6, &t7); in vpx_convolve8_horiz_neon()
310 load_8x8(src, src_stride, &t0, &t1, &t2, &t3, &t4, &t5, &t6, &t7); in vpx_convolve8_horiz_neon()
311 transpose_u8_8x8(&t0, &t1, &t2, &t3, &t4, &t5, &t6, &t7); in vpx_convolve8_horiz_neon()
318 s6 = vreinterpretq_s16_u16(vmovl_u8(t6)); in vpx_convolve8_horiz_neon()
333 load_8x8(s, src_stride, &t0, &t1, &t2, &t3, &t4, &t5, &t6, &t7); in vpx_convolve8_horiz_neon()
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