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/external/valgrind/none/tests/mips32/
Dmips32_dsp.c560 TESTDSPINST_RD_RT_DSPC("absq_s.ph $t6, $t7", 0x73468000, t6, t7); in main()
568 TESTDSPINST_RD_RT_DSPC("absq_s.ph $t6, $t7", 0xf973437b, t6, t7); in main()
576 TESTDSPINST_RD_RT_DSPC("absq_s.ph $t6, $t7", 0x0b300286, t6, t7); in main()
584 TESTDSPINST_RD_RT_DSPC("absq_s.ph $t6, $t7", 0xfabfabfa, t6, t7); in main()
592 TESTDSPINST_RD_RT_DSPC("absq_s.ph $t6, $t7", 0x7b11bee7, t6, t7); in main()
600 TESTDSPINST_RD_RT_DSPC("absq_s.ph $t6, $t7", -237, t6, t7); in main()
606 TESTDSPINST_RD_RT_DSPC("absq_s.w $t6, $t7", 0x73468000, t6, t7); in main()
614 TESTDSPINST_RD_RT_DSPC("absq_s.w $t6, $t7", 0xf973437b, t6, t7); in main()
622 TESTDSPINST_RD_RT_DSPC("absq_s.w $t6, $t7", 0x0b300286, t6, t7); in main()
630 TESTDSPINST_RD_RT_DSPC("absq_s.w $t6, $t7", 0xfabfabfa, t6, t7); in main()
[all …]
Dmips32_dspr2.c553 TESTDSPINST_RD_RT_DSPC("absq_s.qb $t6, $t7", 0x734680bc, t6, t7); in main()
561 TESTDSPINST_RD_RT_DSPC("absq_s.qb $t6, $t7", 0xf973437b, t6, t7); in main()
569 TESTDSPINST_RD_RT_DSPC("absq_s.qb $t6, $t7", 0x00000286, t6, t7); in main()
577 TESTDSPINST_RD_RT_DSPC("absq_s.qb $t6, $t7", 0xfabfabfa, t6, t7); in main()
585 TESTDSPINST_RD_RT_DSPC("absq_s.qb $t6, $t7", 0x7b11bee7, t6, t7); in main()
599 t6, t7, t3); in main()
613 t6, t7, t3); in main()
629 t6, t7, t3); in main()
645 t6, t7, t3); in main()
661 t6, t7, t3); in main()
[all …]
Dbranches.c293 TESTINST1(13, t7); in main()
319 TESTINST2(13, t7); in main()
345 TESTINST3(13, t7); in main()
369 TESTINST4("beq", 11, 0x256, 0x256, t5, t6, t7); in main()
370 TESTINST4("beq", 12, 0x55, 0x55, t6, t7, s0); in main()
387 TESTINST4("bne", 11, 0x256, 0x256, t5, t6, t7); in main()
388 TESTINST4("bne", 12, 0x55, 0x55, t6, t7, s0); in main()
406 TESTINST5("beqz", 12, 0x55, t6, t7); in main()
424 TESTINST5("bgez", 12, 0x55, t6, t7); in main()
442 TESTINST5("bgtz", 12, 0x55, t6, t7); in main()
[all …]
Dmips32_dsp.stdout.exp-BE5 absq_s.ph $t6, $t7 :: rd 0x73467fff rt 0x73468000 DSPControl 0x100000
13 absq_s.ph $t6, $t7 :: rd 0x068d437b rt 0xf973437b DSPControl 0x0
21 absq_s.ph $t6, $t7 :: rd 0x0b300286 rt 0x0b300286 DSPControl 0x0
29 absq_s.ph $t6, $t7 :: rd 0x05415406 rt 0xfabfabfa DSPControl 0x0
37 absq_s.ph $t6, $t7 :: rd 0x7b114119 rt 0x7b11bee7 DSPControl 0x0
45 absq_s.ph $t6, $t7 :: rd 0x000100ed rt 0xffffff13 DSPControl 0x0
50 absq_s.w $t6, $t7 :: rd 0x73468000 rt 0x73468000 DSPControl 0x0
58 absq_s.w $t6, $t7 :: rd 0x068cbc85 rt 0xf973437b DSPControl 0x0
66 absq_s.w $t6, $t7 :: rd 0x0b300286 rt 0x0b300286 DSPControl 0x0
74 absq_s.w $t6, $t7 :: rd 0x05405406 rt 0xfabfabfa DSPControl 0x0
[all …]
Dmips32_dsp.stdout.exp-LE5 absq_s.ph $t6, $t7 :: rd 0x73467fff rt 0x73468000 DSPControl 0x100000
13 absq_s.ph $t6, $t7 :: rd 0x068d437b rt 0xf973437b DSPControl 0x0
21 absq_s.ph $t6, $t7 :: rd 0x0b300286 rt 0x0b300286 DSPControl 0x0
29 absq_s.ph $t6, $t7 :: rd 0x05415406 rt 0xfabfabfa DSPControl 0x0
37 absq_s.ph $t6, $t7 :: rd 0x7b114119 rt 0x7b11bee7 DSPControl 0x0
45 absq_s.ph $t6, $t7 :: rd 0x000100ed rt 0xffffff13 DSPControl 0x0
50 absq_s.w $t6, $t7 :: rd 0x73468000 rt 0x73468000 DSPControl 0x0
58 absq_s.w $t6, $t7 :: rd 0x068cbc85 rt 0xf973437b DSPControl 0x0
66 absq_s.w $t6, $t7 :: rd 0x0b300286 rt 0x0b300286 DSPControl 0x0
74 absq_s.w $t6, $t7 :: rd 0x05405406 rt 0xfabfabfa DSPControl 0x0
[all …]
/external/libjpeg-turbo/simd/
Djsimd_mips_dspr2.S70 addu t7, t4, s0
71 addu t8, t7, s0
74 lbu t7, 0(t7)
79 sb t7, -2(t5)
106 addu t7, t4, s0
107 addu t8, t7, s0
110 lbu t7, 0(t7)
115 sb t7, -2(t5)
167 lw t7, 48(sp) // t7 = num_rows
179 addiu t7, -1 // --num_rows
[all …]
/external/llvm/test/CodeGen/X86/
Dcrash-lre-eliminate-dead-def.ll60 %t7.0 = phi i16 [ undef, %entry ], [ %t7.1, %for.end29 ], [ %t7.19, %cleanup100 ]
94 %t7.1 = phi i16 [ %t7.2, %for.cond17 ], [ %t7.0, %if.end11 ]
100 %t7.2 = phi i16 [ %t7.3, %for.cond20 ], [ %t7.1, %for.cond15 ]
106 %t7.3 = phi i16 [ %t7.4, %for.cond23 ], [ %t7.2, %for.cond17 ]
111 %t7.4 = phi i16 [ %t7.5, %L1 ], [ %t7.3, %for.cond20 ]
116 %t7.5 = phi i16 [ %t7.19, %cleanup100 ], [ %t7.4, %for.cond23 ]
128 %t7.6 = phi i16 [ %t7.1, %for.cond32thread-pre-split ], [ %t7.17, %for.inc94 ]
150 %t7.7 = phi i16 [ %tmp5, %if.then38 ], [ %t7.15, %while.end.split ]
166 %t7.9 = phi i16 [ %t7.7, %if.end48 ], [ %.130, %for.cond52.preheader ]
175 %t7.10 = phi i16 [ %t7.19, %cleanup100.L5_crit_edge ], [ %t7.9, %if.then63 ], [ %t7.0, %if.end11 ]
[all …]
Dmasked-iv-unsafe.ll26 %t7 = load double, double* %t6
27 %t8 = fmul double %t7, 4.5
54 %t7 = load double, double* %t6
55 %t8 = fmul double %t7, 4.5
84 %t7 = load double, double* %t6
85 %t8 = fmul double %t7, 4.5
114 %t7 = load double, double* %t6
115 %t8 = fmul double %t7, 4.5
142 %t7 = load double, double* %t6
143 %t8 = fmul double %t7, 4.5
[all …]
Dmasked-iv-safe.ll28 %t7 = load double, double* %t6
29 %t8 = fmul double %t7, 4.5
61 %t7 = load double, double* %t6
62 %t8 = fmul double %t7, 4.5
96 %t7 = load double, double* %t6
97 %t8 = fmul double %t7, 4.5
131 %t7 = load double, double* %t6
132 %t8 = fmul double %t7, 4.5
164 %t7 = load double, double* %t6
165 %t8 = fmul double %t7, 4.5
[all …]
Dvec_ins_extract-1.ll8 define i32 @t0(i32 inreg %t7, <4 x i32> inreg %t8) nounwind {
29 %t13 = insertelement <4 x i32> %t8, i32 76, i32 %t7
34 define i32 @t1(i32 inreg %t7, <4 x i32> inreg %t8) nounwind {
58 %t9 = extractelement <4 x i32> %t13, i32 %t7
62 define <4 x i32> @t2(i32 inreg %t7, <4 x i32> inreg %t8) nounwind {
81 %t9 = extractelement <4 x i32> %t8, i32 %t7
86 define <4 x i32> @t3(i32 inreg %t7, <4 x i32> inreg %t8) nounwind {
108 %t13 = insertelement <4 x i32> %t8, i32 %t9, i32 %t7
/external/swiftshader/third_party/LLVM/test/CodeGen/X86/
Dvec_ins_extract-1.ll6 define i32 @t0(i32 inreg %t7, <4 x i32> inreg %t8) nounwind {
7 %t13 = insertelement <4 x i32> %t8, i32 76, i32 %t7
11 define i32 @t1(i32 inreg %t7, <4 x i32> inreg %t8) nounwind {
13 %t9 = extractelement <4 x i32> %t13, i32 %t7
16 define <4 x i32> @t2(i32 inreg %t7, <4 x i32> inreg %t8) nounwind {
17 %t9 = extractelement <4 x i32> %t8, i32 %t7
21 define <4 x i32> @t3(i32 inreg %t7, <4 x i32> inreg %t8) nounwind {
23 %t13 = insertelement <4 x i32> %t8, i32 %t9, i32 %t7
Dmasked-iv-unsafe.ll26 %t7 = load double* %t6
27 %t8 = fmul double %t7, 4.5
54 %t7 = load double* %t6
55 %t8 = fmul double %t7, 4.5
84 %t7 = load double* %t6
85 %t8 = fmul double %t7, 4.5
114 %t7 = load double* %t6
115 %t8 = fmul double %t7, 4.5
142 %t7 = load double* %t6
143 %t8 = fmul double %t7, 4.5
[all …]
Dmasked-iv-safe.ll31 %t7 = load double* %t6
32 %t8 = fmul double %t7, 4.5
59 %t7 = load double* %t6
60 %t8 = fmul double %t7, 4.5
89 %t7 = load double* %t6
90 %t8 = fmul double %t7, 4.5
119 %t7 = load double* %t6
120 %t8 = fmul double %t7, 4.5
147 %t7 = load double* %t6
148 %t8 = fmul double %t7, 4.5
[all …]
/external/speex/libspeex/
Dsmallft.c278 int t0,t1,t2,t3,t4,t5,t6,t7,t8,t9,t10; in dradfg() local
424 t7=idl1; in dradfg()
427 ch2[t4++]=c2[ik]+ar1*c2[t7++]; in dradfg()
447 t7=t2; in dradfg()
452 ch2[t7++]+=ai2*c2[t9++]; in dradfg()
502 t7=t4; in dradfg()
506 cc[t5]=ch[t7]; in dradfg()
509 t7+=ido; in dradfg()
526 t7=t3; in dradfg()
532 cc[i+t7-1]=ch[i+t8-1]+ch[i+t9-1]; in dradfg()
[all …]
/external/compiler-rt/lib/sanitizer_common/tests/
Dsanitizer_bvgraph_test.cc270 BV t7; in ShortestPath() local
271 t7.clear(); in ShortestPath()
272 t7.setBit(7); in ShortestPath()
282 EXPECT_TRUE(g.isReachable(1, t7)); in ShortestPath()
284 EXPECT_EQ(0U, g.findPath(1, t7, path, 1)); in ShortestPath()
286 EXPECT_EQ(2U, g.findPath(1, t7, path, 2)); in ShortestPath()
287 EXPECT_EQ(2U, g.findPath(1, t7, path, 3)); in ShortestPath()
288 EXPECT_EQ(2U, g.findPath(1, t7, path, 4)); in ShortestPath()
289 EXPECT_EQ(2U, g.findPath(1, t7, path, 5)); in ShortestPath()
290 EXPECT_EQ(2U, g.findPath(1, t7, path, 6)); in ShortestPath()
[all …]
/external/python/cpython2/Lib/test/
Dtest_pkg.py250 t7, sub, subsub = None, None, None
251 import t7 as tas
255 self.assertFalse(t7)
256 from t7 import sub as subpar
260 self.assertFalse(t7)
262 from t7.sub import subsub as subsubsub
266 self.assertFalse(t7)
269 from t7.sub.subsub import spam as ham
271 self.assertFalse(t7)
/external/llvm/test/MC/Mips/
Dmips64-register-names-n32-n64.s30 # WARNING: mips64-register-names-n32-n64.s:[[@LINE+4]]:9: warning: register names $t4-$t7 are only …
35 # WARNING: mips64-register-names-n32-n64.s:[[@LINE+4]]:9: warning: register names $t4-$t7 are only …
40 # WARNING: mips64-register-names-n32-n64.s:[[@LINE+4]]:9: warning: register names $t4-$t7 are only …
45 # WARNING: mips64-register-names-n32-n64.s:[[@LINE+4]]:9: warning: register names $t4-$t7 are only …
46 # WARNING-NEXT: daddiu $t7, $zero, 0 # {{CHECK}}: encoding: [0x64,0x0f,0x00,0x00]
49 daddiu $t7, $zero, 0 # CHECK: encoding: [0x64,0x0f,0x00,0x00]
68 # [*] - t0-t3 are aliases of t4-t7 for compatibility with both the original
69 # ABI documentation (using t4-t7) and GNU As (using t0-t3)
/external/openssh/regress/
DMakefile3 REGRESS_TARGETS= unit t1 t2 t3 t4 t5 t6 t7 t8 t9 t10 t11 t12 t-exec
114 t6.out1 t6.out2 t7.out t7.out.pub t8.out t8.out.pub \
156 $(OBJ)/t7.out:
159 t7: $(OBJ)/t7.out target
160 ${TEST_SSH_SSHKEYGEN} -lf $(OBJ)/t7.out > /dev/null
161 ${TEST_SSH_SSHKEYGEN} -Bf $(OBJ)/t7.out > /dev/null
/external/v8/src/mips/
Dcodegen-mips.cc145 __ lw(t7, MemOperand(a1, 7, loadstore_chunk)); in CreateMemCopyUint8Function()
155 __ sw(t7, MemOperand(a0, 7, loadstore_chunk)); in CreateMemCopyUint8Function()
164 __ lw(t7, MemOperand(a1, 15, loadstore_chunk)); in CreateMemCopyUint8Function()
174 __ sw(t7, MemOperand(a0, 15, loadstore_chunk)); in CreateMemCopyUint8Function()
195 __ lw(t7, MemOperand(a1, 7, loadstore_chunk)); in CreateMemCopyUint8Function()
204 __ sw(t7, MemOperand(a0, 7, loadstore_chunk)); in CreateMemCopyUint8Function()
309 __ lwr(t7, MemOperand(a1, 7, loadstore_chunk)); in CreateMemCopyUint8Function()
324 __ lwl(t7, in CreateMemCopyUint8Function()
344 __ lwl(t7, MemOperand(a1, 7, loadstore_chunk)); in CreateMemCopyUint8Function()
359 __ lwr(t7, in CreateMemCopyUint8Function()
[all …]
/external/compiler-rt/test/asan/TestCases/Posix/
Dstack-overflow.cc37 int t0, t1, t2, t3, t4, t5, t6, t7, t8, t9, t10, t11, t12, t13; in recursive_func()
45 t7 = z7; in recursive_func()
60 z7 = t7; in recursive_func()
/external/llvm/test/Transforms/Reassociate/
Dmightymul.ll12 %t7 = mul i32 %t6, %t6
13 %t8 = mul i32 %t7, %t7
Dfast-mightymul.ll12 %t7 = fmul fast float %t6, %t6
13 %t8 = fmul fast float %t7, %t7
/external/libvpx/libvpx/vpx_dsp/arm/
Dvpx_convolve8_neon.c226 uint8x8_t t4, t5, t6, t7; in vpx_convolve8_horiz_neon() local
231 load_8x8(src, src_stride, &t0, &t1, &t2, &t3, &t4, &t5, &t6, &t7); in vpx_convolve8_horiz_neon()
232 transpose_u8_8x8(&t0, &t1, &t2, &t3, &t4, &t5, &t6, &t7); in vpx_convolve8_horiz_neon()
241 load_8x8(src + 7, src_stride, &t0, &t1, &t2, &t3, &t4, &t5, &t6, &t7); in vpx_convolve8_horiz_neon()
251 transpose_u8_8x8(&t0, &t1, &t2, &t3, &t4, &t5, &t6, &t7); in vpx_convolve8_horiz_neon()
310 load_8x8(src, src_stride, &t0, &t1, &t2, &t3, &t4, &t5, &t6, &t7); in vpx_convolve8_horiz_neon()
311 transpose_u8_8x8(&t0, &t1, &t2, &t3, &t4, &t5, &t6, &t7); in vpx_convolve8_horiz_neon()
333 load_8x8(s, src_stride, &t0, &t1, &t2, &t3, &t4, &t5, &t6, &t7); in vpx_convolve8_horiz_neon()
334 transpose_u8_8x8(&t0, &t1, &t2, &t3, &t4, &t5, &t6, &t7); in vpx_convolve8_horiz_neon()
342 s14 = vreinterpretq_s16_u16(vmovl_u8(t7)); in vpx_convolve8_horiz_neon()
[all …]
/external/libcxx/test/std/utilities/intseq/intseq.general/
Dinteger_seq.pass.cpp61 auto t7 = extract ( tup, size7 ()); in main() local
62 static_assert ( std::tuple_size<decltype(t7)>::value == size7::size (), "t7 size wrong"); in main()
63 assert ( t7 == std::make_tuple ( 10, 11, 12, 13, 14, 15, 16 )); in main()
/external/clang/test/CodeGen/
Dms_struct-bitfield-1.c61 } ATTR t7; variable
62 static int a7[(sizeof(t7) == 16) -1];

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