/external/llvm/test/MC/AArch64/ |
D | neon-tbl.s | 33 tbx v0.8b, { v1.16b }, v2.8b 34 tbx v0.8b, { v1.16b, v2.16b }, v2.8b 35 tbx v0.8b, { v1.16b, v2.16b, v3.16b }, v2.8b 36 tbx v0.8b, { v1.16b, v2.16b, v3.16b, v4.16b }, v2.8b 37 tbx v0.8b, { v31.16b, v0.16b, v1.16b, v2.16b }, v2.8b 45 tbx v0.16b, { v1.16b }, v2.16b 46 tbx v0.16b, { v1.16b, v2.16b }, v2.16b 47 tbx v0.16b, { v1.16b, v2.16b, v3.16b }, v2.16b 48 tbx v0.16b, { v1.16b, v2.16b, v3.16b, v4.16b }, v2.16b 49 tbx v0.16b, { v30.16b, v31.16b, v0.16b, v1.16b }, v2.16b
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D | arm64-diags.s | 310 tbx v3.16b, { v12.8b, v13.8b, v14.8b }, v6.8b label 311 tbx v2.8b, { v0 }, v6.8b label 319 ; CHECK-ERRORS: tbx v3.16b, { v12.8b, v13.8b, v14.8b }, v6.8b 322 ; CHECK-ERRORS: tbx v2.8b, { v0 }, v6.8b
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D | neon-diagnostics.s | 7139 tbx v0.8b, {v1.8b}, v2.8b 7140 tbx v0.8b, {v1.8b, v2.8b}, v2.8b 7141 tbx v0.8b, {v1.8b, v2.8b, v3.8b}, v2.8b 7142 tbx v0.8b, {v1.8b, v2.8b, v3.8b, v4.8b}, v2.8b 7143 tbx v0.8b, {v1.16b, v2.16b, v3.16b, v4.16b, v5.16b}, v2.8b
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/external/icu/icu4c/source/common/ |
D | cstring.c | 160 int32_t tbx = sizeof(tbuf); in T_CString_integerToString() local 173 tbx = sizeof(tbuf)-1; in T_CString_integerToString() 174 tbuf[tbx] = 0; /* We are generating the digits backwards. Null term the end. */ in T_CString_integerToString() 177 tbuf[--tbx] = (char)(T_CString_itosOffset(digit)); in T_CString_integerToString() 182 uprv_strcpy(buffer+length, tbuf+tbx); in T_CString_integerToString() 183 length += sizeof(tbuf) - tbx -1; in T_CString_integerToString() 198 int32_t tbx = sizeof(tbuf); in T_CString_int64ToString() local 211 tbx = sizeof(tbuf)-1; in T_CString_int64ToString() 212 tbuf[tbx] = 0; /* We are generating the digits backwards. Null term the end. */ in T_CString_int64ToString() 215 tbuf[--tbx] = (char)(T_CString_itosOffset(digit)); in T_CString_int64ToString() [all …]
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/external/llvm/test/CodeGen/AArch64/ |
D | arm64-tbl.ll | 70 ; CHECK: tbx.8b 77 ; CHECK: tbx.16b 84 ; CHECK: tbx.8b 91 ; CHECK: tbx.16b 98 ; CHECK: tbx.8b 105 ; CHECK: tbx.16b 112 ; CHECK: tbx.8b 119 ; CHECK: tbx.16b
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/external/dtc/tests/ |
D | run_tests.sh | 667 run_fdtget_test "61 62 63 0" -tbx $dtb /randomnode tricky1 668 run_fdtget_test "a b c d de ea ad be ef" -tbx $dtb /randomnode blob 703 -tbx "a b c ea ad be ef"
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/external/llvm/test/MC/Disassembler/AArch64/ |
D | arm64-advsimd.txt | 2241 # CHECK: tbx.16b v2, { v4, v5, v6, v7 }, v1 2242 # CHECK: tbx.8b v0, { v4, v5, v6, v7 }, v1 2243 # CHECK: tbx.16b v2, { v5 }, v1 2244 # CHECK: tbx.8b v0, { v5 }, v1 2245 # CHECK: tbx.16b v2, { v5, v6, v7 }, v1 2246 # CHECK: tbx.8b v0, { v5, v6, v7 }, v1 2247 # CHECK: tbx.16b v2, { v6, v7 }, v1 2248 # CHECK: tbx.8b v0, { v6, v7 }, v1
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D | neon-instructions.txt | 2517 # CHECK: tbx v0.8b, { v1.16b }, v2.8b 2518 # CHECK: tbx v16.8b, { v31.16b, v0.16b }, v2.8b 2519 # CHECK: tbx v0.8b, { v1.16b, v2.16b, v3.16b }, v2.8b 2520 # CHECK: tbx v16.8b, { v23.16b, v24.16b, v25.16b, v26.16b }, v2.8b 2526 # CHECK: tbx v0.16b, { v1.16b }, v2.16b 2527 # CHECK: tbx v16.16b, { v31.16b, v0.16b }, v2.16b 2528 # CHECK: tbx v0.16b, { v1.16b, v2.16b, v3.16b }, v2.16b 2529 # CHECK: tbx v16.16b, { v31.16b, v0.16b, v1.16b, v2.16b }, v2.16b
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/external/vixl/src/aarch64/ |
D | assembler-aarch64.h | 548 void tbx(const VRegister& vd, const VRegister& vn, const VRegister& vm); 551 void tbx(const VRegister& vd, 557 void tbx(const VRegister& vd, 564 void tbx(const VRegister& vd,
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D | simulator-aarch64.h | 2318 LogicVRegister tbx(VectorFormat vform, 2322 LogicVRegister tbx(VectorFormat vform, 2327 LogicVRegister tbx(VectorFormat vform, 2333 LogicVRegister tbx(VectorFormat vform,
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D | macro-assembler-aarch64.h | 1973 tbx(vd, vn, vm); in Tbx() 1981 tbx(vd, vn, vn2, vm); in Tbx() 1990 tbx(vd, vn, vn2, vn3, vm); in Tbx() 2000 tbx(vd, vn, vn2, vn3, vn4, vm); in Tbx()
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D | simulator-aarch64.cc | 5147 tbx(vf, rd, rn, rm); in VisitNEONTable() 5150 tbx(vf, rd, rn, rn2, rm); in VisitNEONTable() 5153 tbx(vf, rd, rn, rn2, rn3, rm); in VisitNEONTable() 5156 tbx(vf, rd, rn, rn2, rn3, rn4, rm); in VisitNEONTable()
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D | logic-aarch64.cc | 2677 LogicVRegister Simulator::tbx(VectorFormat vform, in tbx() function in vixl::aarch64::Simulator 2685 LogicVRegister Simulator::tbx(VectorFormat vform, in tbx() function in vixl::aarch64::Simulator 2694 LogicVRegister Simulator::tbx(VectorFormat vform, in tbx() function in vixl::aarch64::Simulator 2704 LogicVRegister Simulator::tbx(VectorFormat vform, in tbx() function in vixl::aarch64::Simulator
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D | assembler-aarch64.cc | 308 void Assembler::tbx(const VRegister& vd, in tbx() function in vixl::aarch64::Assembler 315 void Assembler::tbx(const VRegister& vd, in tbx() function in vixl::aarch64::Assembler 326 void Assembler::tbx(const VRegister& vd, in tbx() function in vixl::aarch64::Assembler 338 void Assembler::tbx(const VRegister& vd, in tbx() function in vixl::aarch64::Assembler
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/external/vixl/test/aarch64/ |
D | test-trace-aarch64.cc | 2149 __ tbx(v25.V16B(), v25.V16B(), v26.V16B(), v27.V16B(), v28.V16B(), v5.V16B()); in GenerateTestSequenceNEON() local 2150 __ tbx(v21.V16B(), v29.V16B(), v30.V16B(), v31.V16B(), v24.V16B()); in GenerateTestSequenceNEON() local 2151 __ tbx(v6.V16B(), v16.V16B(), v17.V16B(), v1.V16B()); in GenerateTestSequenceNEON() local 2152 __ tbx(v13.V16B(), v3.V16B(), v20.V16B()); in GenerateTestSequenceNEON() local 2153 __ tbx(v24.V8B(), v29.V16B(), v30.V16B(), v31.V16B(), v0.V16B(), v9.V8B()); in GenerateTestSequenceNEON() local 2154 __ tbx(v17.V8B(), v9.V16B(), v10.V16B(), v11.V16B(), v26.V8B()); in GenerateTestSequenceNEON() local 2155 __ tbx(v5.V8B(), v3.V16B(), v4.V16B(), v21.V8B()); in GenerateTestSequenceNEON() local 2156 __ tbx(v16.V8B(), v11.V16B(), v29.V8B()); in GenerateTestSequenceNEON() local
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/external/vixl/test/test-trace-reference/ |
D | log-disasm | 1806 0x~~~~~~~~~~~~~~~~ 4e057339 tbx v25.16b, {v25.16b, v26.16b, v27.16b, v28.16b}, v5.16b 1807 0x~~~~~~~~~~~~~~~~ 4e1853b5 tbx v21.16b, {v29.16b, v30.16b, v31.16b}, v24.16b 1808 0x~~~~~~~~~~~~~~~~ 4e013206 tbx v6.16b, {v16.16b, v17.16b}, v1.16b 1809 0x~~~~~~~~~~~~~~~~ 4e14106d tbx v13.16b, {v3.16b}, v20.16b 1810 0x~~~~~~~~~~~~~~~~ 0e0973b8 tbx v24.8b, {v29.16b, v30.16b, v31.16b, v0.16b}, v9.8b 1811 0x~~~~~~~~~~~~~~~~ 0e1a5131 tbx v17.8b, {v9.16b, v10.16b, v11.16b}, v26.8b 1812 0x~~~~~~~~~~~~~~~~ 0e153065 tbx v5.8b, {v3.16b, v4.16b}, v21.8b 1813 0x~~~~~~~~~~~~~~~~ 0e1d1170 tbx v16.8b, {v11.16b}, v29.8b
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D | log-disasm-colour | 1806 0x~~~~~~~~~~~~~~~~ 4e057339 tbx v25.16b, {v25.16b, v26.16b, v27.16b, v28.16b}, v5.16b 1807 0x~~~~~~~~~~~~~~~~ 4e1853b5 tbx v21.16b, {v29.16b, v30.16b, v31.16b}, v24.16b 1808 0x~~~~~~~~~~~~~~~~ 4e013206 tbx v6.16b, {v16.16b, v17.16b}, v1.16b 1809 0x~~~~~~~~~~~~~~~~ 4e14106d tbx v13.16b, {v3.16b}, v20.16b 1810 0x~~~~~~~~~~~~~~~~ 0e0973b8 tbx v24.8b, {v29.16b, v30.16b, v31.16b, v0.16b}, v9.8b 1811 0x~~~~~~~~~~~~~~~~ 0e1a5131 tbx v17.8b, {v9.16b, v10.16b, v11.16b}, v26.8b 1812 0x~~~~~~~~~~~~~~~~ 0e153065 tbx v5.8b, {v3.16b, v4.16b}, v21.8b 1813 0x~~~~~~~~~~~~~~~~ 0e1d1170 tbx v16.8b, {v11.16b}, v29.8b
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D | log-all | 4915 0x~~~~~~~~~~~~~~~~ 4e057339 tbx v25.16b, {v25.16b, v26.16b, v27.16b, v28.16b}, v5.16b 4917 0x~~~~~~~~~~~~~~~~ 4e1853b5 tbx v21.16b, {v29.16b, v30.16b, v31.16b}, v24.16b 4919 0x~~~~~~~~~~~~~~~~ 4e013206 tbx v6.16b, {v16.16b, v17.16b}, v1.16b 4921 0x~~~~~~~~~~~~~~~~ 4e14106d tbx v13.16b, {v3.16b}, v20.16b 4923 0x~~~~~~~~~~~~~~~~ 0e0973b8 tbx v24.8b, {v29.16b, v30.16b, v31.16b, v0.16b}, v9.8b 4925 0x~~~~~~~~~~~~~~~~ 0e1a5131 tbx v17.8b, {v9.16b, v10.16b, v11.16b}, v26.8b 4927 0x~~~~~~~~~~~~~~~~ 0e153065 tbx v5.8b, {v3.16b, v4.16b}, v21.8b 4929 0x~~~~~~~~~~~~~~~~ 0e1d1170 tbx v16.8b, {v11.16b}, v29.8b
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/external/vixl/doc/aarch64/ |
D | supported-instructions-aarch64.md | 3976 void tbx(const VRegister& vd, 3988 void tbx(const VRegister& vd, 3997 void tbx(const VRegister& vd, 4008 void tbx(const VRegister& vd,
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/external/libjpeg-turbo/simd/ |
D | jsimd_arm64_neon.S | 3084 tbx v1.16b, {v28.16b}, v16.16b 3085 tbx v2.16b, {v29.16b, v30.16b}, v17.16b 3086 tbx v5.16b, {v29.16b, v30.16b}, v18.16b 3087 tbx v6.16b, {v31.16b}, v19.16b
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/external/valgrind/none/tests/arm64/ |
D | fp_and_simd.stdout.exp | 28735 tbx v21.16b, {v15.16b}, v23.16b 8ee035f5f00518abb45c48b1e40438c2 cb0469e92542bc8a436f7b3bbf60629… 28736 eor v16.16b, v15.16b, v21.16b ; tbx v21.16b, {v15.16b, v16.16b}, v23.16b a339937ad8a420ea64b8ca70… 28737 eor v16.16b, v15.16b, v21.16b ; eor v17.16b, v15.16b, v23.16b ; tbx v21.16b, {v15.16b, v16.16b, v17… 28738 eor v16.16b, v15.16b, v21.16b ; eor v17.16b, v15.16b, v23.16b ; eor v18.16b, v21.16b, v23.16b ; tbx… 28739 tbx v21.8b, {v15.16b}, v23.8b e412d18f96114a7815ef611a4794041d 944cde242eaf5e8a06fd2a3b92d77bc2 … 28740 eor v16.16b, v15.16b, v21.16b ; tbx v21.8b, {v15.16b, v16.16b}, v23.8b 07373f45667e2c9ae8fbe74e2b… 28741 eor v16.16b, v15.16b, v21.16b ; eor v17.16b, v15.16b, v23.16b ; tbx v21.8b, {v15.16b, v16.16b, v17.… 28742 eor v16.16b, v15.16b, v21.16b ; eor v17.16b, v15.16b, v23.16b ; eor v18.16b, v21.16b, v23.16b ; tbx…
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/external/llvm/lib/Target/AArch64/ |
D | AArch64InstrInfo.td | 3738 defm TBX : SIMDTableLookupTied<1, "tbx">;
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