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Searched refs:tileInfo (Results 1 – 6 of 6) sorted by relevance

/external/mesa3d/src/amd/addrlib/r800/
Dciaddrlib.cpp225 UINT_32 samplesPerSplit = pIn->tileInfo.tileSplitBytes / tileSizePerSample; in HwlComputeDccInfo()
230 UINT_32 fastClearBaseAlign = HwlGetPipes(&pIn->tileInfo) * m_pipeInterleaveBytes; in HwlComputeDccInfo()
246 pOut->dccRamBaseAlign = pIn->tileInfo.banks * in HwlComputeDccInfo()
247 HwlGetPipes(&pIn->tileInfo) * in HwlComputeDccInfo()
259 UINT_64 dccRamSizeAlign = HwlGetPipes(&pIn->tileInfo) * m_pipeInterleaveBytes; in HwlComputeDccInfo()
650 ADDR_TILEINFO tileInfo = {0}; in HwlComputeFmaskInfo() local
659 pOut->pTileInfo = &tileInfo; in HwlComputeFmaskInfo()
713 if (pOut->pTileInfo == &tileInfo) in HwlComputeFmaskInfo()
Degbaddrlib.cpp1128 ADDR_TILEINFO tileInfo = *pIn->pTileInfo; in HwlDegradeBaseLevel() local
1143 &tileInfo, in HwlDegradeBaseLevel()
1144 &tileInfo, in HwlDegradeBaseLevel()
1153 &tileInfo, in HwlDegradeBaseLevel()
3155 ADDR_TILEINFO tileInfo = {0}; in HwlComputeFmaskInfo() local
3160 pOut->pTileInfo = &tileInfo; in HwlComputeFmaskInfo()
3173 if (pOut->pTileInfo == &tileInfo) in HwlComputeFmaskInfo()
4282 ADDR_TILEINFO tileInfo = {0}; in HwlComputeSurfaceInfo() local
4289 pOut->pTileInfo = &tileInfo; in HwlComputeSurfaceInfo()
4313 if (pOut->pTileInfo == &tileInfo) in HwlComputeSurfaceInfo()
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/external/mesa3d/src/amd/vulkan/winsys/amdgpu/
Dradv_amdgpu_surface.c246 AddrDccIn->tileInfo = *AddrSurfInfoOut->pTileInfo; in radv_compute_level()
/external/mesa3d/src/gallium/winsys/amdgpu/drm/
Damdgpu_surface.c226 AddrDccIn->tileInfo = *AddrSurfInfoOut->pTileInfo; in compute_level()
/external/mesa3d/src/amd/addrlib/
Daddrinterface.h2120 ADDR_TILEINFO tileInfo; ///< Tile info of color surface member
/external/mesa3d/src/amd/addrlib/core/
Daddrlib.cpp1584 &input.tileInfo, &input.tileMode); in ComputeDccInfo()