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Searched refs:tile_mode (Results 1 – 25 of 31) sorted by relevance

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/external/mesa3d/src/gallium/drivers/nouveau/nv50/
Dnv50_miptree.c35 uint32_t tile_mode = 0x000; in nv50_tex_choose_tile_dims_helper() local
37 if (ny > 64) tile_mode = 0x040; /* height 128 tiles */ in nv50_tex_choose_tile_dims_helper()
39 if (ny > 32) tile_mode = 0x030; /* height 64 tiles */ in nv50_tex_choose_tile_dims_helper()
41 if (ny > 16) tile_mode = 0x020; /* height 32 tiles */ in nv50_tex_choose_tile_dims_helper()
43 if (ny > 8) tile_mode = 0x010; /* height 16 tiles */ in nv50_tex_choose_tile_dims_helper()
46 return tile_mode; in nv50_tex_choose_tile_dims_helper()
48 if (tile_mode > 0x020) in nv50_tex_choose_tile_dims_helper()
49 tile_mode = 0x020; in nv50_tex_choose_tile_dims_helper()
51 if (nz > 16 && tile_mode < 0x020) in nv50_tex_choose_tile_dims_helper()
52 return tile_mode | 0x500; /* depth 32 tiles */ in nv50_tex_choose_tile_dims_helper()
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Dnv50_transfer.h18 uint16_t tile_mode; member
Dnv50_transfer.c41 rect->tile_mode = mt->level[l].tile_mode; in nv50_m2mf_rect_setup()
79 PUSH_DATA (push, src->tile_mode); in nv50_m2mf_transfer_rect()
96 PUSH_DATA (push, dst->tile_mode); in nv50_m2mf_transfer_rect()
Dnv50_resource.h43 uint32_t tile_mode; member
Dnv50_tex.c157 ((mt->level[0].tile_mode & 0x0f0) << (22 - 4)) | in nv50_create_texture_view()
158 ((mt->level[0].tile_mode & 0xf00) << (25 - 8)); in nv50_create_texture_view()
Dnv50_state_validate.c64 PUSH_DATA (push, mt->level[sf->base.u.tex.level].tile_mode); in nv50_validate_fb()
105 PUSH_DATA (push, mt->level[sf->base.u.tex.level].tile_mode); in nv50_validate_fb()
/external/libdrm/radeon/
Dradeon_surface.c1291 unsigned mode, unsigned *tile_mode, unsigned *stencil_tile_mode) in si_surface_sanity() argument
1356 *tile_mode = SI_TILE_MODE_DEPTH_STENCIL_2D; in si_surface_sanity()
1359 *tile_mode = SI_TILE_MODE_DEPTH_STENCIL_2D_2AA; in si_surface_sanity()
1362 *tile_mode = SI_TILE_MODE_DEPTH_STENCIL_2D_4AA; in si_surface_sanity()
1365 *tile_mode = SI_TILE_MODE_DEPTH_STENCIL_2D_8AA; in si_surface_sanity()
1373 *tile_mode = SI_TILE_MODE_COLOR_2D_SCANOUT_16BPP; in si_surface_sanity()
1376 *tile_mode = SI_TILE_MODE_COLOR_2D_SCANOUT_32BPP; in si_surface_sanity()
1384 *tile_mode = SI_TILE_MODE_COLOR_2D_8BPP; in si_surface_sanity()
1387 *tile_mode = SI_TILE_MODE_COLOR_2D_16BPP; in si_surface_sanity()
1390 *tile_mode = SI_TILE_MODE_COLOR_2D_32BPP; in si_surface_sanity()
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/external/mesa3d/src/gallium/drivers/nouveau/nvc0/
Dnvc0_miptree.c177 mt->level[0].tile_mode = 0x10; in nvc0_miptree_init_layout_video()
214 lvl->tile_mode = nvc0_tex_choose_tile_dims(nbx, nby, d, mt->layout_3d); in nvc0_miptree_init_layout_tiled()
216 tsx = NVC0_TILE_SIZE_X(lvl->tile_mode); /* x is tile row pitch in bytes */ in nvc0_miptree_init_layout_tiled()
217 tsy = NVC0_TILE_SIZE_Y(lvl->tile_mode); in nvc0_miptree_init_layout_tiled()
218 tsz = NVC0_TILE_SIZE_Z(lvl->tile_mode); in nvc0_miptree_init_layout_tiled()
231 NVC0_TILE_SIZE(mt->level[0].tile_mode)); in nvc0_miptree_init_layout_tiled()
300 bo_config.nvc0.tile_mode = mt->level[0].tile_mode; in nvc0_miptree_create()
333 unsigned tds = NVC0_TILE_SHIFT_Z(mt->level[l].tile_mode); in nvc0_mt_zslice_offset()
334 unsigned ths = NVC0_TILE_SHIFT_Y(mt->level[l].tile_mode); in nvc0_mt_zslice_offset()
340 unsigned stride_2d = NVC0_TILE_SIZE_2D(mt->level[l].tile_mode); in nvc0_mt_zslice_offset()
Dnvc0_tex.c161 ((mt->level[0].tile_mode & 0x0f0) >> 4 << 3) | in gm107_create_texture_view()
162 ((mt->level[0].tile_mode & 0xf00) >> 8 << 6); in gm107_create_texture_view()
368 ((mt->level[0].tile_mode & 0x0f0) << (22 - 4)) | in gf100_create_texture_view()
369 ((mt->level[0].tile_mode & 0xf00) << (25 - 8)); in gf100_create_texture_view()
932 info[4] |= (lvl->tile_mode & 0x0f0) << 25; in nve4_set_surface_info()
933 info[4] |= NVC0_TILE_SHIFT_Y(lvl->tile_mode) << 22; in nve4_set_surface_info()
936 info[6] |= (lvl->tile_mode & 0xf00) << 21; in nve4_set_surface_info()
937 info[6] |= NVC0_TILE_SHIFT_Z(lvl->tile_mode) << 22; in nve4_set_surface_info()
1053 PUSH_DATA (push, lvl->tile_mode & 0xff); /* mask out z-tiling */ in nvc0_validate_suf()
Dnvc0_video_bsp.c71 cfg.nvc0.tile_mode = 0x10; in nvc0_decoder_bsp_next()
107 cfg.nvc0.tile_mode = 0x10; in nvc0_decoder_bsp_next()
Dnvc0_transfer.c39 PUSH_DATA (push, src->tile_mode); in nvc0_m2mf_transfer_rect()
55 PUSH_DATA (push, dst->tile_mode); in nvc0_m2mf_transfer_rect()
143 PUSH_DATA (push, 0x1000 | dst->tile_mode); in nve4_m2mf_transfer_rect()
151 PUSH_DATA (push, 0x1000 | src->tile_mode); in nve4_m2mf_transfer_rect()
/external/libdrm/nouveau/
Dabi16.c298 bo->config.nvc0.tile_mode = info->tile_mode; in abi16_bo_info()
303 bo->config.nv50.tile_mode = info->tile_mode << 4; in abi16_bo_info()
306 bo->config.nv04.surf_pitch = info->tile_mode; in abi16_bo_info()
343 info->tile_mode = config->nvc0.tile_mode; in abi16_bo_init()
348 info->tile_mode = config->nv50.tile_mode >> 4; in abi16_bo_init()
351 info->tile_mode = config->nv04.surf_pitch; in abi16_bo_init()
Dnouveau.h103 uint32_t tile_mode; member
107 uint32_t tile_mode; member
/external/mesa3d/src/gallium/drivers/radeonsi/
Dsi_dma.c146 unsigned tile_mode = info->si_tile_mode_array[index]; in si_dma_copy_tile() local
169 array_mode = G_009910_ARRAY_MODE(tile_mode); in si_dma_copy_tile()
182 bank_h = G_009910_BANK_HEIGHT(tile_mode); in si_dma_copy_tile()
183 bank_w = G_009910_BANK_WIDTH(tile_mode); in si_dma_copy_tile()
184 mt_aspect = G_009910_MACRO_TILE_ASPECT(tile_mode); in si_dma_copy_tile()
187 nbanks = G_009910_NUM_BANKS(tile_mode); in si_dma_copy_tile()
191 pipe_config = G_009910_PIPE_CONFIG(tile_mode); in si_dma_copy_tile()
192 mt = G_009910_MICRO_TILE_MODE(tile_mode); in si_dma_copy_tile()
Dcik_sdma.c125 unsigned tile_mode = info->si_tile_mode_array[tile_index]; in encode_tile_info() local
129 (G_009910_ARRAY_MODE(tile_mode) << 3) | in encode_tile_info()
130 (G_009910_MICRO_TILE_MODE_NEW(tile_mode) << 8) | in encode_tile_info()
137 (G_009910_PIPE_CONFIG(tile_mode) << 26); in encode_tile_info()
/external/libdrm/include/drm/
Dnouveau_drm.h121 uint32_t tile_mode; member
127 uint32_t tile_mode; member
254 uint32_t tile_mode; member
/external/mesa3d/src/gallium/winsys/radeon/drm/
Dradeon_drm_surface.c54 uint32_t tile_mode; in set_micro_tile_mode() local
61 tile_mode = info->si_tile_mode_array[surf->tiling_index[0]]; in set_micro_tile_mode()
64 surf->micro_tile_mode = G_009910_MICRO_TILE_MODE_NEW(tile_mode); in set_micro_tile_mode()
66 surf->micro_tile_mode = G_009910_MICRO_TILE_MODE(tile_mode); in set_micro_tile_mode()
/external/mesa3d/src/gallium/drivers/freedreno/a5xx/
Dfd5_gmem.c49 enum a5xx_tile_mode tile_mode; in emit_mrt() local
53 tile_mode = TILE5_2; in emit_mrt()
55 tile_mode = TILE5_LINEAR; in emit_mrt()
97 A5XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE(tile_mode) | in emit_mrt()
/external/mesa3d/src/amd/vulkan/winsys/amdgpu/
Dradv_amdgpu_surface.c269 uint32_t tile_mode = info->si_tile_mode_array[surf->tiling_index[0]]; in radv_set_micro_tile_mode() local
272 surf->micro_tile_mode = G_009910_MICRO_TILE_MODE_NEW(tile_mode); in radv_set_micro_tile_mode()
274 surf->micro_tile_mode = G_009910_MICRO_TILE_MODE(tile_mode); in radv_set_micro_tile_mode()
/external/mesa3d/src/gallium/winsys/amdgpu/drm/
Damdgpu_surface.c278 uint32_t tile_mode = info->si_tile_mode_array[surf->tiling_index[0]]; in set_micro_tile_mode() local
281 surf->micro_tile_mode = G_009910_MICRO_TILE_MODE_NEW(tile_mode); in set_micro_tile_mode()
283 surf->micro_tile_mode = G_009910_MICRO_TILE_MODE(tile_mode); in set_micro_tile_mode()
/external/kernel-headers/original/uapi/drm/
Dnouveau_drm.h55 __u32 tile_mode; member
/external/mesa3d/src/gallium/drivers/freedreno/a4xx/
Dfd4_gmem.c52 enum a4xx_tile_mode tile_mode; in emit_mrt() local
56 tile_mode = 2; in emit_mrt()
58 tile_mode = TILE4_LINEAR; in emit_mrt()
116 A4XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE(tile_mode) | in emit_mrt()
/external/libdrm/libkms/
Dnouveau.c113 arg.info.tile_mode = 0; in nouveau_bo_create()
/external/mesa3d/src/gallium/drivers/freedreno/a3xx/
Dfd3_gmem.c51 enum a3xx_tile_mode tile_mode; in emit_mrt() local
55 tile_mode = TILE_32X32; in emit_mrt()
57 tile_mode = LINEAR; in emit_mrt()
113 A3XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE(tile_mode) | in emit_mrt()
/external/mesa3d/src/amd/vulkan/
Dradv_device.c1782 unsigned tile_mode = info->si_tile_mode_array[tiling_index]; in radv_initialise_ds_surface() local
1787 S_02803C_ARRAY_MODE(G_009910_ARRAY_MODE(tile_mode)) | in radv_initialise_ds_surface()
1788 S_02803C_PIPE_CONFIG(G_009910_PIPE_CONFIG(tile_mode)) | in radv_initialise_ds_surface()
1793 ds->db_z_info |= S_028040_TILE_SPLIT(G_009910_TILE_SPLIT(tile_mode)); in radv_initialise_ds_surface()

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