Searched refs:tiling_index (Results 1 – 15 of 15) sorted by relevance
61 tile_mode = info->si_tile_mode_array[surf->tiling_index[0]]; in set_micro_tile_mode()163 surf_drm->tiling_index[i] = surf_ws->tiling_index[i]; in surf_winsys_to_drm()205 surf_ws->tiling_index[i] = surf_drm->tiling_index[i]; in surf_drm_to_winsys()
135 return image->surface.tiling_index[level]; in si_tile_mode_index()498 out->tile_mode_index = fmask.tiling_index[0]; in radv_image_get_fmask_info()833 image->surface.tiling_index[0] = 10; in radv_image_set_optimal_micro_tile_mode()836 image->surface.tiling_index[0] = 14; in radv_image_set_optimal_micro_tile_mode()839 image->surface.tiling_index[0] = 28; in radv_image_set_optimal_micro_tile_mode()850 image->surface.tiling_index[0] = 10; in radv_image_set_optimal_micro_tile_mode()853 image->surface.tiling_index[0] = 11; in radv_image_set_optimal_micro_tile_mode()856 image->surface.tiling_index[0] = 12; in radv_image_set_optimal_micro_tile_mode()863 image->surface.tiling_index[0] = 14; in radv_image_set_optimal_micro_tile_mode()866 image->surface.tiling_index[0] = 15; in radv_image_set_optimal_micro_tile_mode()[all …]
203 uint32_t tiling_index[RADEON_SURF_MAX_LEVEL]; member
1577 return image->surface.tiling_index[level]; in si_tile_mode_index()1779 unsigned tiling_index = iview->image->surface.tiling_index[level]; in radv_initialise_ds_surface() local1782 unsigned tile_mode = info->si_tile_mode_array[tiling_index]; in radv_initialise_ds_surface()
729 tile_mode_index = image->surface.tiling_index[0]; in radv_set_optimal_micro_tile_mode()
138 uint32_t tiling_index[RADEON_SURF_MAX_LEVEL]; member
1547 surf->tiling_index[i] = tile_mode; in si_surface_init_linear_aligned()1591 surf->tiling_index[i] = tile_mode; in si_surface_init_1d()1693 surf->tiling_index[i] = tile_mode; in si_surface_init_2d()2295 surf->tiling_index[i] = tile_mode; in cik_surface_init_2d()
640 out->tile_mode_index = fmask.tiling_index[0]; in r600_texture_get_fmask_info()961 rtex->surface.tiling_index[i]); in r600_print_texture_info()2353 rtex->surface.tiling_index[0] = 10; in si_set_optimal_micro_tile_mode()2356 rtex->surface.tiling_index[0] = 14; in si_set_optimal_micro_tile_mode()2359 rtex->surface.tiling_index[0] = 28; in si_set_optimal_micro_tile_mode()2370 rtex->surface.tiling_index[0] = 10; in si_set_optimal_micro_tile_mode()2373 rtex->surface.tiling_index[0] = 11; in si_set_optimal_micro_tile_mode()2376 rtex->surface.tiling_index[0] = 12; in si_set_optimal_micro_tile_mode()2383 rtex->surface.tiling_index[0] = 14; in si_set_optimal_micro_tile_mode()2386 rtex->surface.tiling_index[0] = 15; in si_set_optimal_micro_tile_mode()[all …]
343 uint8_t tiling_index[RADEON_SURF_MAX_LEVELS]; member
123 unsigned tile_index = tex->surface.tiling_index[level]; in encode_tile_info()158 unsigned dst_tile_index = rdst->surface.tiling_index[dst_level]; in cik_sdma_copy_texture()159 unsigned src_tile_index = rsrc->surface.tiling_index[src_level]; in cik_sdma_copy_texture()
367 return rtex->surface.tiling_index[level]; in si_tile_mode_index()
145 unsigned index = rtiled->surface.tiling_index[tiled_lvl]; in si_dma_copy_tile()
2234 unsigned index = rtex->surface.tiling_index[level]; in si_init_depth_surface()
233 surf->tiling_index[level] = AddrSurfInfoOut->tileIndex; in radv_compute_level()269 uint32_t tile_mode = info->si_tile_mode_array[surf->tiling_index[0]]; in radv_set_micro_tile_mode()
214 surf->tiling_index[level] = AddrSurfInfoOut->tileIndex; in compute_level()278 uint32_t tile_mode = info->si_tile_mode_array[surf->tiling_index[0]]; in set_micro_tile_mode()