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Searched refs:tmp216 (Results 1 – 19 of 19) sorted by relevance

/external/swiftshader/third_party/LLVM/test/CodeGen/X86/
Dlsr-redundant-addressing.ll38 %tmp216 = add nsw i32 %tmp34, 1
39 store i32 %tmp216, i32* %tmp47, align 16
40 %tmp217 = sext i32 %tmp216 to i64
D2009-03-23-MultiUseSched.ll228 %tmp216 = add i64 %tmp211, %tmp166 ; <i64> [#uses=2]
234 %tmp221 = add i64 %tmp220, %tmp216 ; <i64> [#uses=1]
237 %tmp224 = add i64 %tmp223, %tmp216 ; <i64> [#uses=1]
/external/llvm/test/CodeGen/X86/
Dlsr-redundant-addressing.ll38 %tmp216 = add nsw i32 %tmp34, 1
39 store i32 %tmp216, i32* %tmp47, align 16
40 %tmp217 = sext i32 %tmp216 to i64
D2009-03-23-MultiUseSched.ll229 %tmp216 = add i64 %tmp211, %tmp166 ; <i64> [#uses=2]
235 %tmp221 = add i64 %tmp220, %tmp216 ; <i64> [#uses=1]
238 %tmp224 = add i64 %tmp223, %tmp216 ; <i64> [#uses=1]
Dragreedy-last-chance-recoloring.ll48 %tmp216 = urem i32 -717428541, %tmp214
49 %tmp217 = getelementptr i8, i8* %tmp215, i32 %tmp216
Dlarge-gep-chain.ll238 %tmp216 = getelementptr inbounds float, float* %tmp215, i64 1
239 %tmp217 = getelementptr inbounds float, float* %tmp216, i64 1
/external/webrtc/webrtc/modules/audio_coding/codecs/isac/fix/source/
Dfft.c75 int16_t tmp116, tmp216; in WebRtcIsacfix_FftRadix16Fastest() local
180 tmp216 = bjQx >> 1; in WebRtcIsacfix_FftRadix16Fastest()
182 bkQx = bkQx - tmp216; in WebRtcIsacfix_FftRadix16Fastest()
184 tmp216 = ImxQx[k1] - ImxQx[k2]; in WebRtcIsacfix_FftRadix16Fastest()
187 bjQx = (int16_t)WEBRTC_SPL_MUL_16_16_RSFT(sss60Q14, tmp216, 14); // Q14*Qx>>14 = Qx in WebRtcIsacfix_FftRadix16Fastest()
/external/swiftshader/third_party/LLVM/test/CodeGen/PowerPC/
D2006-05-12-rlwimi-crash.ll51 %tmp216 = and i32 %tmp212, -129 ; <i32> [#uses=1]
52 %tmp217 = or i32 %tmp216, %tmp214 ; <i32> [#uses=1]
D2009-09-18-carrybit.ll28 %tmp216 = shl i64 %tmp215, 32 ; <i64> [#uses=1]
34 %ins224 = or i64 %tmp216, %tmp222 ; <i64> [#uses=2]
/external/llvm/test/CodeGen/PowerPC/
D2006-05-12-rlwimi-crash.ll51 %tmp216 = and i32 %tmp212, -129 ; <i32> [#uses=1]
52 %tmp217 = or i32 %tmp216, %tmp214 ; <i32> [#uses=1]
D2009-09-18-carrybit.ll28 %tmp216 = shl i64 %tmp215, 32 ; <i64> [#uses=1]
34 %ins224 = or i64 %tmp216, %tmp222 ; <i64> [#uses=2]
/external/llvm/test/Transforms/LoopStrengthReduce/
D2012-07-18-LimitReassociate.ll447 %tmp216 = add i64 undef, %tmp208
466 %tmp227 = add i64 %tmp222, %tmp216
/external/llvm/test/CodeGen/AMDGPU/
Dsi-sgpr-spill.ll240 %tmp216 = bitcast float %tmp135 to i32
244 %tmp220 = insertelement <8 x i32> undef, i32 %tmp216, i32 0
874 %tmp216 = fmul float %tmp206, %tmp214
899 %tmp234 = fmul float %tmp216, %tmp184
904 %tmp239 = fmul float %tmp216, %tmp187
909 %tmp244 = fmul float %tmp216, %tmp190
1503 %tmp746 = fmul float %temp13.0, %tmp216
Dvgpr-spill-emergency-stack-slot.ll277 %tmp216 = insertelement <128 x float> %tmp215, float %tmp31, i32 54
278 %tmp217 = insertelement <128 x float> %tmp216, float %tmp30, i32 55
Dvgpr-spill-emergency-stack-slot-compute.ll397 %tmp216 = insertelement <128 x float> %tmp215, float %tmp40, i32 66
398 %tmp217 = insertelement <128 x float> %tmp216, float %tmp44, i32 67
Dbig_alu.ll237 %tmp216 = fmul float %tmp206, %tmp215
238 %tmp217 = fmul float %tmp206, %tmp216
/external/swiftshader/third_party/LLVM/test/Transforms/SimplifyCFG/
D2009-06-15-InvokeCrash.ll347 %tmp216 = icmp eq i32 %tmp211, 0 ; <i1> [#uses=1]
348 br i1 %tmp216, label %cond_true217, label %cond_next225
D2006-10-29-InvokeCrash.ll345 %tmp216 = icmp eq i32 %tmp211, 0 ; <i1> [#uses=1]
346 br i1 %tmp216, label %cond_true217, label %cond_next225
/external/llvm/test/CodeGen/ARM/
Dthumb-big-stack.ll1426 %tmp216 = load <4 x float>, <4 x float>* undef, align 16
1428 %vecins1743 = insertelement <4 x float> %tmp216, float %add1742, i32 2