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/external/llvm/test/Transforms/ObjCARC/
Dweak-dce.ll13 %tmp26 = call i8* @objc_loadWeakRetained(i8** %weakBlock) nounwind
25 %tmp26 = call i8* @objc_loadWeakRetained(i8** %weakBlock) nounwind
27 ret i8* %tmp26
38 %tmp26 = call i8* @objc_loadWeakRetained(i8** %weakBlock) nounwind
40 ret i8* %tmp26
/external/llvm/test/Transforms/InstCombine/
D2006-12-01-BadFPVectorXform.ll4 define <4 x float> @test(<4 x float> %tmp26, <4 x float> %tmp53) {
7 ; CHECK-NEXT: [[TMP64:%.*]] = fadd <4 x float> %tmp26, %tmp53
11 %tmp64 = fadd <4 x float> %tmp26, %tmp53
D2006-12-08-Phi-ICmp-Op-Fold.ll42 %tmp26 = icmp sgt i32 %tmp13, 0 ; <i1> [#uses=1]
43 %tmp26.upgrd.5 = zext i1 %tmp26 to i32 ; <i32> [#uses=1]
47 …%retval.0 = phi i32 [ %tmp14.upgrd.4, %cond_true ], [ %tmp26.upgrd.5, %cond_false ] ; <i32> [#use…
D2009-02-25-CrashZeroSizeArray.ll29 %tmp26 = zext i1 %tmp25 to i8 ; <i8> [#uses=1]
30 %toBool711 = icmp ne i8 %tmp26, 0 ; <i1> [#uses=1]
/external/swiftshader/third_party/LLVM/test/Transforms/InstCombine/
D2006-12-08-Phi-ICmp-Op-Fold.ll42 %tmp26 = icmp sgt i32 %tmp13, 0 ; <i1> [#uses=1]
43 %tmp26.upgrd.5 = zext i1 %tmp26 to i32 ; <i32> [#uses=1]
47 …%retval.0 = phi i32 [ %tmp14.upgrd.4, %cond_true ], [ %tmp26.upgrd.5, %cond_false ] ; <i32> [#use…
D2006-12-01-BadFPVectorXform.ll4 define <4 x float> @test(<4 x float> %tmp26, <4 x float> %tmp53) {
6 %tmp64 = fadd <4 x float> %tmp26, %tmp53 ; <<4 x float>> [#uses=1]
/external/swiftshader/third_party/LLVM/test/Transforms/IndVarSimplify/
Dpolynomial-expand.ll13 %tmp26 = phi i32 [ %tmp41, %bb40 ], [ undef, %bb20 ] ; <i32> [#uses=2]
14 %tmp27 = add nsw i32 %tmp26, -1 ; <i32> [#uses=1]
31 %tmp41 = sub i32 %tmp26, %tmp25 ; <i32> [#uses=1]
/external/llvm/test/Transforms/IndVarSimplify/
Dpolynomial-expand.ll13 %tmp26 = phi i32 [ %tmp41, %bb40 ], [ undef, %bb20 ] ; <i32> [#uses=2]
14 %tmp27 = add nsw i32 %tmp26, -1 ; <i32> [#uses=1]
31 %tmp41 = sub i32 %tmp26, %tmp25 ; <i32> [#uses=1]
/external/swiftshader/third_party/LLVM/test/CodeGen/X86/
D2008-03-10-RegAllocInfLoop.ll11 …%tmp26 = call fastcc i8* @w_addchar( i8* null, i32* %word_length, i32* %max_length, i8 signext %t…
12 store i8* %tmp26, i8** %word, align 4
Dvec_set-4.ll17 %tmp26 = insertelement <16 x i8> %tmp24, i8 0, i32 11 ; <<16 x i8>> [#uses=1]
18 %tmp28 = insertelement <16 x i8> %tmp26, i8 0, i32 12 ; <<16 x i8>> [#uses=1]
Dvec_shuffle-18.ll17 %tmp26 = getelementptr i8* %a, i32 8 ; <i8*> [#uses=1]
18 %tmp33 = bitcast i8* %tmp26 to double* ; <double*> [#uses=1]
D2007-11-04-LiveIntervalCrash.ll19 %tmp26 = add i64 %tmp22, 0 ; <i64> [#uses=1]
20 %tmp27 = mul i64 %tmp26, 11 ; <i64> [#uses=2]
Ddagcombine-cse.ll16 %tmp26 = shl i64 %tmp2425, 32 ; <i64> [#uses=1]
18 %tmp29 = or i64 %tmp26, %tmp2728 ; <i64> [#uses=1]
/external/llvm/test/CodeGen/X86/
D2008-03-10-RegAllocInfLoop.ll11 …%tmp26 = call fastcc i8* @w_addchar( i8* null, i32* %word_length, i32* %max_length, i8 signext %t…
12 store i8* %tmp26, i8** %word, align 4
Dvec_set-4.ll27 %tmp26 = insertelement <16 x i8> %tmp24, i8 0, i32 11
28 %tmp28 = insertelement <16 x i8> %tmp26, i8 0, i32 12
D2007-11-04-LiveIntervalCrash.ll19 %tmp26 = add i64 %tmp22, 0 ; <i64> [#uses=1]
20 %tmp27 = mul i64 %tmp26, 11 ; <i64> [#uses=2]
Ddagcombine-cse.ll17 %tmp26 = shl i64 %tmp2425, 32 ; <i64> [#uses=1]
19 %tmp29 = or i64 %tmp26, %tmp2728 ; <i64> [#uses=1]
D2011-06-12-FastAllocSpill.ll48 %tmp26 = icmp ult i64 %tmp25, 10
49 br i1 %tmp26, label %bb8, label %bb27
/external/llvm/test/CodeGen/AMDGPU/
Dstore-barrier.ll26 %tmp26 = sext i32 %tmp25 to i64
30 %tmp30 = getelementptr inbounds <2 x i8>, <2 x i8> addrspace(1)* %arg3, i64 %tmp26, i64 %tmp27
34 %tmp35 = getelementptr inbounds <2 x i8>, <2 x i8> addrspace(1)* %arg3, i64 %tmp26, i64 0
Dsgpr-copy.ll26 %tmp26 = fsub float -0.000000e+00, %tmp21
30 %temp.0 = phi float [ %tmp26, %ELSE ], [ %tmp21, %main_body ]
47 %tmp26 = call float @llvm.SI.load.const(<16 x i8> %tmp20, i32 52)
91 %tmp69 = fmul float %tmp26, %tmp68
168 %tmp26 = bitcast i32 %tmp25 to float
169 %tmp27 = bitcast float %tmp26 to i32
238 %tmp26 = load <16 x i8>, <16 x i8> addrspace(2)* %tmp25, !tbaa !0
240 %tmp26.bc = bitcast <16 x i8> %tmp26 to <4 x i32>
244 …mage.sample.v2i32(<2 x i32> zeroinitializer, <8 x i32> %tmp24, <4 x i32> %tmp26.bc, i32 15, i32 0,…
251 …image.sample.v2i32(<2 x i32> <i32 1, i32 0>, <8 x i32> %tmp24, <4 x i32> %tmp26.bc, i32 15, i32 0,…
[all …]
Dcoalescer_distribute.ll39 %tmp26 = phi i32 [ %tmp24, %bb23 ], [ undef, %bb25 ]
46 %tmp33 = zext i32 %tmp26 to i64
/external/swiftshader/third_party/LLVM/test/Transforms/SimplifyCFG/
D2009-01-19-UnconditionalTrappingConstantExpr.ll12 %tmp26 = icmp sgt i32 sdiv (i32 -32768, i32 ptrtoint (i32* @G to i32)), 0
13 br i1 %tmp26, label %bb6, label %bb2
/external/llvm/test/Transforms/SimplifyCFG/
D2009-01-19-UnconditionalTrappingConstantExpr.ll17 %tmp26 = icmp sgt i32 sdiv (i32 -32768, i32 ptrtoint (i32* @G to i32)), 0
18 br i1 %tmp26, label %bb6, label %bb2
/external/llvm/test/Bitcode/
Dmetadata-2.ll45 %tmp26 = add i32 %tmp24, %tmp22 ; <i32> [#uses=1]
46 %tmp28 = and i32 %tmp26, 65535 ; <i32> [#uses=1]
70 %tmp26 = and i32 %tmp25, -16711936 ; <i32> [#uses=1]
71 %tmp27 = or i32 %tmp23, %tmp26 ; <i32> [#uses=2]
/external/swiftshader/third_party/LLVM/test/Bitcode/
Dmetadata-2.ll44 %tmp26 = add i32 %tmp24, %tmp22 ; <i32> [#uses=1]
45 %tmp28 = and i32 %tmp26, 65535 ; <i32> [#uses=1]
69 %tmp26 = and i32 %tmp25, -16711936 ; <i32> [#uses=1]
70 %tmp27 = or i32 %tmp23, %tmp26 ; <i32> [#uses=2]

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