| /external/valgrind/none/tests/arm/ |
| D | v6media.stdout.exp | 1039 uadd8 r0, r1, r2 :: rd 0x0021ff02 rm 0x0009ffff, rn 0x00180003, carryin 0, cpsr 0x00010000 ge…
1040 uadd8 r0, r1, r2 :: rd 0x0021ff02 rm 0x00180003, rn 0x0009ffff, carryin 0, cpsr 0x00010000 ge…
1041 uadd8 r0, r1, r2 :: rd 0xff020021 rm 0x00030018, rn 0xffff0009, carryin 0, cpsr 0x00040000 ge…
1042 uadd8 r0, r1, r2 :: rd 0xff020021 rm 0xffff0009, rn 0x00030018, carryin 0, cpsr 0x00040000 ge…
1043 uadd8 r0, r1, r2 :: rd 0xff000221 rm 0x00000318, rn 0xff00ff09, carryin 0, cpsr 0x00020000 ge…
1044 uadd8 r0, r1, r2 :: rd 0xff020021 rm 0xffff0009, rn 0x00030018, carryin 0, cpsr 0x00040000 ge…
1045 uadd8 r0, r1, r2 :: rd 0xff090221 rm 0x00020318, rn 0xff07ff09, carryin 0, cpsr 0x00020000 ge…
1046 uadd8 r0, r1, r2 :: rd 0xff090221 rm 0xff07ff09, rn 0x00020318, carryin 0, cpsr 0x00020000 ge…
1047 uadd8 r0, r1, r2 :: rd 0xa299daa0 rm 0xd83b849b, rn 0xca5e5605, carryin 0, cpsr 0x00080000 ge…
1048 uadd8 r0, r1, r2 :: rd 0x5c604bd2 rm 0x0cdafabe, rn 0x50865114, carryin 0, cpsr 0x00060000 ge…
[all …]
|
| /external/vixl/test/aarch32/ |
| D | test-assembler-cond-rd-rn-rm-t32.cc | 100 M(uadd8) \
|
| D | test-assembler-cond-rd-rn-rm-a32.cc | 101 M(uadd8) \
|
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| D | basic-arm-instructions.s | 2299 uadd8 r1, r2, r3
2304 @ CHECK: uadd8 r1, r2, r3 @ encoding: [0x93,0x1f,0x52,0xe6]
|
| D | basic-thumb2-instructions.s | 2805 uadd8 r1, r2, r3
2811 @ CHECK: uadd8 r1, r2, r3 @ encoding: [0x82,0xfa,0x43,0xf1]
|
| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 3539 void uadd8(Condition cond, Register rd, Register rn, Register rm);
3540 void uadd8(Register rd, Register rn, Register rm) { uadd8(al, rd, rn, rm); } in uadd8() function
|
| D | disasm-aarch32.h | 1236 void uadd8(Condition cond, Register rd, Register rn, Register rm);
|
| D | assembler-aarch32.cc | 11877 void Assembler::uadd8(Condition cond, Register rd, Register rn, Register rm) { in uadd8() function in vixl::aarch32::Assembler
11894 Delegate(kUadd8, &Assembler::uadd8, cond, rd, rn, rm); in uadd8()
|
| D | disasm-aarch32.cc | 3328 void Disassembler::uadd8(Condition cond, in uadd8() function in vixl::aarch32::Disassembler
21079 uadd8(CurrentCond(), in DecodeT32()
63538 uadd8(condition, Register(rd), Register(rn), Register(rm)); in DecodeA32()
|
| D | macro-assembler-aarch32.h | 4857 uadd8(cond, rd, rn, rm); in Uadd8()
|
| /external/llvm/test/MC/ARM/ |
| D | basic-thumb2-instructions.s | 3302 uadd8 r1, r2, r3
3308 @ CHECK: uadd8 r1, r2, r3 @ encoding: [0x82,0xfa,0x43,0xf1]
|
| D | basic-arm-instructions.s | 3217 uadd8 r1, r2, r3
3222 @ CHECK: uadd8 r1, r2, r3 @ encoding: [0x93,0x1f,0x52,0xe6]
|
| /external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
| D | basic-arm-instructions.txt | 2037 # CHECK: uadd8 r1, r2, r3
|
| D | thumb2.txt | 2175 # CHECK: uadd8 r1, r2, r3
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | thumb2.txt | 2326 # CHECK: uadd8 r1, r2, r3
|
| D | basic-arm-instructions.txt | 2210 # CHECK: uadd8 r1, r2, r3
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 1963 def t2UADD8 : T2I_pam<0b000, 0b0100, "uadd8">;
|
| D | ARMInstrInfo.td | 3196 def UADD8 : AAI<0b01100101, 0b11111001, "uadd8">;
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 2168 def t2UADD8 : T2I_pam<0b000, 0b0100, "uadd8">;
|
| D | ARMInstrInfo.td | 3597 def UADD8 : AAI<0b01100101, 0b11111001, "uadd8">;
|