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Searched refs:uhasx (Results 1 – 20 of 20) sorted by relevance

/external/valgrind/none/tests/arm/
Dv6media.stdout.exp4165 uhasx r0, r1, r2 :: rd 0x00067ff3 rm 0x0009ffff, rn 0x00180003, carryin 0, cpsr 0x00000000 ge…
4166 uhasx r0, r1, r2 :: rd 0x800bfffd rm 0x00180003, rn 0x0009ffff, carryin 0, cpsr 0x00000000 ge…
4167 uhasx r0, r1, r2 :: rd 0x0006800c rm 0x00030018, rn 0xffff0009, carryin 0, cpsr 0x00000000 ge…
4168 uhasx r0, r1, r2 :: rd 0x800b0003 rm 0xffff0009, rn 0x00030018, carryin 0, cpsr 0x00000000 ge…
4169 uhasx r0, r1, r2 :: rd 0x3fff3fff rm 0x7fff7fff, rn 0x00000000, carryin 0, cpsr 0x00000000 ge…
4170 uhasx r0, r1, r2 :: rd 0x7f80c07f rm 0x7fff00ff, rn 0x80017f01, carryin 0, cpsr 0x00000000 ge…
4171 uhasx r0, r1, r2 :: rd 0x40004000 rm 0x80008000, rn 0x00000000, carryin 0, cpsr 0x00000000 ge…
4172 uhasx r0, r1, r2 :: rd 0xbfffc000 rm 0x80008000, rn 0xffffffff, carryin 0, cpsr 0x00000000 ge…
4173 uhasx r0, r1, r2 :: rd 0xccf8c6a7 rm 0xb8035b5b, rn 0xce0ce1ed, carryin 0, cpsr 0x00000000 ge…
4174 uhasx r0, r1, r2 :: rd 0x2bd0e57a rm 0x146275d8, rn 0xaae3433f, carryin 0, cpsr 0x00000000 ge…
[all …]
/external/vixl/test/aarch32/
Dtest-assembler-cond-rd-rn-rm-t32.cc81 M(uhasx) \
Dtest-assembler-cond-rd-rn-rm-a32.cc82 M(uhasx) \
/external/swiftshader/third_party/LLVM/test/MC/ARM/
Dbasic-thumb2-instructions.s2866 uhasx r4, r1, r5
2877 @ CHECK: uhasx r4, r1, r5 @ encoding: [0xa1,0xfa,0x65,0xf4]
2882 @ CHECK: uhasx r4, r1, r5 @ encoding: [0xa1,0xfa,0x65,0xf4]
Dbasic-arm-instructions.s2345 uhasx r4, r8, r2
2348 @ CHECK: uhasx r4, r8, r2 @ encoding: [0x32,0x4f,0x78,0xe6]
/external/llvm/test/MC/ARM/
Dbasic-thumb2-instructions.s3363 uhasx r4, r1, r5
3374 @ CHECK: uhasx r4, r1, r5 @ encoding: [0xa1,0xfa,0x65,0xf4]
3379 @ CHECK: uhasx r4, r1, r5 @ encoding: [0xa1,0xfa,0x65,0xf4]
Dbasic-arm-instructions.s3263 uhasx r4, r8, r2
3266 @ CHECK: uhasx r4, r8, r2 @ encoding: [0x32,0x4f,0x78,0xe6]
/external/vixl/src/aarch32/
Dassembler-aarch32.h3570 void uhasx(Condition cond, Register rd, Register rn, Register rm);
3571 void uhasx(Register rd, Register rn, Register rm) { uhasx(al, rd, rn, rm); } in uhasx() function
Ddisasm-aarch32.h1254 void uhasx(Condition cond, Register rd, Register rn, Register rm);
Dassembler-aarch32.cc12043 void Assembler::uhasx(Condition cond, Register rd, Register rn, Register rm) { in uhasx() function in vixl::aarch32::Assembler
12060 Delegate(kUhasx, &Assembler::uhasx, cond, rd, rn, rm); in uhasx()
Ddisasm-aarch32.cc3404 void Disassembler::uhasx(Condition cond, in uhasx() function in vixl::aarch32::Disassembler
21223 uhasx(CurrentCond(), in DecodeT32()
63751 uhasx(condition, Register(rd), Register(rn), Register(rm)); in DecodeA32()
Dmacro-assembler-aarch32.h4946 uhasx(cond, rd, rn, rm); in Uhasx()
/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/
Dbasic-arm-instructions.txt2083 # CHECK: uhasx r4, r8, r2
Dthumb2.txt2236 # CHECK: uhasx r4, r1, r5
/external/llvm/test/MC/Disassembler/ARM/
Dthumb2.txt2387 # CHECK: uhasx r4, r1, r5
Dbasic-arm-instructions.txt2256 # CHECK: uhasx r4, r8, r2
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DARMInstrInfo.td3209 def UHASX : AAI<0b01100111, 0b11110011, "uhasx">;
4985 def : MnemonicAlias<"uhaddsubx", "uhasx">;
DARMInstrThumb2.td1976 def t2UHASX : T2I_pam<0b010, 0b0110, "uhasx">;
/external/llvm/lib/Target/ARM/
DARMInstrInfo.td3610 def UHASX : AAI<0b01100111, 0b11110011, "uhasx">;
5695 def : MnemonicAlias<"uhaddsubx", "uhasx">;
DARMInstrThumb2.td2181 def t2UHASX : T2I_pam<0b010, 0b0110, "uhasx">;