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Searched refs:uqsub16 (Results 1 – 21 of 21) sorted by relevance

/external/valgrind/none/tests/arm/
Dv6media.stdout.exp3985 uqsub16 r0, r1, r2 :: rd 0x0000fffc rm 0x0009ffff, rn 0x00180003, carryin 0, cpsr 0x00000000 …
3986 uqsub16 r0, r1, r2 :: rd 0x000f0000 rm 0x00180003, rn 0x0009ffff, carryin 0, cpsr 0x00000000 …
3987 uqsub16 r0, r1, r2 :: rd 0x0000000f rm 0x00030018, rn 0xffff0009, carryin 0, cpsr 0x00000000 …
3988 uqsub16 r0, r1, r2 :: rd 0xfffc0000 rm 0xffff0009, rn 0x00030018, carryin 0, cpsr 0x00000000 …
3989 uqsub16 r0, r1, r2 :: rd 0x00000000 rm 0x00000318, rn 0xff00ff09, carryin 0, cpsr 0x00000000 …
3990 uqsub16 r0, r1, r2 :: rd 0xfffc0000 rm 0xffff0009, rn 0x00030018, carryin 0, cpsr 0x00000000 …
3991 uqsub16 r0, r1, r2 :: rd 0x00000000 rm 0x00020318, rn 0xff07ff09, carryin 0, cpsr 0x00000000 …
3992 uqsub16 r0, r1, r2 :: rd 0xff05fbf1 rm 0xff07ff09, rn 0x00020318, carryin 0, cpsr 0x00000000 …
3993 uqsub16 r0, r1, r2 :: rd 0x00000000 rm 0xb8035b5b, rn 0xce0ce1ed, carryin 0, cpsr 0x00000000 …
3994 uqsub16 r0, r1, r2 :: rd 0x00003299 rm 0x146275d8, rn 0xaae3433f, carryin 0, cpsr 0x00000000 …
[all …]
/external/vixl/test/aarch32/
Dtest-assembler-cond-rd-rn-rm-t32.cc89 M(uqsub16) \
Dtest-assembler-cond-rd-rn-rm-a32.cc90 M(uqsub16) \
/external/valgrind/docs/internals/
D3_8_BUGSTATUS.txt45 (304035: ARM: uqsub16 shadd16 uhsub8 uhsub16)
/external/swiftshader/third_party/LLVM/test/MC/ARM/
Dbasic-arm-instructions.s2442 uqsub16 r1, r5, r3
2447 @ CHECK: uqsub16 r1, r5, r3 @ encoding: [0x73,0x1f,0x65,0xe6]
Dbasic-thumb2-instructions.s2989 uqsub16 r1, r9, r7
2995 @ CHECK: uqsub16 r1, r9, r7 @ encoding: [0xd9,0xfa,0x57,0xf1]
/external/vixl/src/aarch32/
Dassembler-aarch32.h3628 void uqsub16(Condition cond, Register rd, Register rn, Register rm);
3629 void uqsub16(Register rd, Register rn, Register rm) { in uqsub16() function
3630 uqsub16(al, rd, rn, rm); in uqsub16()
Ddisasm-aarch32.h1285 void uqsub16(Condition cond, Register rd, Register rn, Register rm);
Dassembler-aarch32.cc12301 void Assembler::uqsub16(Condition cond, Register rd, Register rn, Register rm) { in uqsub16() function in vixl::aarch32::Assembler
12318 Delegate(kUqsub16, &Assembler::uqsub16, cond, rd, rn, rm); in uqsub16()
Ddisasm-aarch32.cc3543 void Disassembler::uqsub16(Condition cond, in uqsub16() function in vixl::aarch32::Disassembler
21646 uqsub16(CurrentCond(), in DecodeT32()
63820 uqsub16(condition, in DecodeA32()
Dmacro-assembler-aarch32.h5176 uqsub16(cond, rd, rn, rm); in Uqsub16()
/external/llvm/test/MC/ARM/
Dbasic-thumb2-instructions.s3486 uqsub16 r1, r9, r7
3492 @ CHECK: uqsub16 r1, r9, r7 @ encoding: [0xd9,0xfa,0x57,0xf1]
Dbasic-arm-instructions.s3360 uqsub16 r1, r5, r3
3365 @ CHECK: uqsub16 r1, r5, r3 @ encoding: [0x73,0x1f,0x65,0xe6]
/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/
Dbasic-arm-instructions.txt2180 # CHECK: uqsub16 r1, r5, r3
Dthumb2.txt2336 # CHECK: uqsub16 r1, r9, r7
/external/llvm/test/MC/Disassembler/ARM/
Dthumb2.txt2487 # CHECK: uqsub16 r1, r9, r7
Dbasic-arm-instructions.txt2353 # CHECK: uqsub16 r1, r5, r3
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DARMInstrThumb2.td1950 def t2UQSUB16 : T2I_pam<0b101, 0b0101, "uqsub16">;
DARMInstrInfo.td3183 def UQSUB16 : AAI<0b01100110, 0b11110111, "uqsub16">;
/external/llvm/lib/Target/ARM/
DARMInstrThumb2.td2155 def t2UQSUB16 : T2I_pam<0b101, 0b0101, "uqsub16">;
DARMInstrInfo.td3584 def UQSUB16 : AAI<0b01100110, 0b11110111, "uqsub16">;