/external/valgrind/none/tests/arm/ |
D | v6media.stdout.exp | 3985 uqsub16 r0, r1, r2 :: rd 0x0000fffc rm 0x0009ffff, rn 0x00180003, carryin 0, cpsr 0x00000000 … 3986 uqsub16 r0, r1, r2 :: rd 0x000f0000 rm 0x00180003, rn 0x0009ffff, carryin 0, cpsr 0x00000000 … 3987 uqsub16 r0, r1, r2 :: rd 0x0000000f rm 0x00030018, rn 0xffff0009, carryin 0, cpsr 0x00000000 … 3988 uqsub16 r0, r1, r2 :: rd 0xfffc0000 rm 0xffff0009, rn 0x00030018, carryin 0, cpsr 0x00000000 … 3989 uqsub16 r0, r1, r2 :: rd 0x00000000 rm 0x00000318, rn 0xff00ff09, carryin 0, cpsr 0x00000000 … 3990 uqsub16 r0, r1, r2 :: rd 0xfffc0000 rm 0xffff0009, rn 0x00030018, carryin 0, cpsr 0x00000000 … 3991 uqsub16 r0, r1, r2 :: rd 0x00000000 rm 0x00020318, rn 0xff07ff09, carryin 0, cpsr 0x00000000 … 3992 uqsub16 r0, r1, r2 :: rd 0xff05fbf1 rm 0xff07ff09, rn 0x00020318, carryin 0, cpsr 0x00000000 … 3993 uqsub16 r0, r1, r2 :: rd 0x00000000 rm 0xb8035b5b, rn 0xce0ce1ed, carryin 0, cpsr 0x00000000 … 3994 uqsub16 r0, r1, r2 :: rd 0x00003299 rm 0x146275d8, rn 0xaae3433f, carryin 0, cpsr 0x00000000 … [all …]
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/external/vixl/test/aarch32/ |
D | test-assembler-cond-rd-rn-rm-t32.cc | 89 M(uqsub16) \
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D | test-assembler-cond-rd-rn-rm-a32.cc | 90 M(uqsub16) \
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/external/valgrind/docs/internals/ |
D | 3_8_BUGSTATUS.txt | 45 (304035: ARM: uqsub16 shadd16 uhsub8 uhsub16)
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/external/swiftshader/third_party/LLVM/test/MC/ARM/ |
D | basic-arm-instructions.s | 2442 uqsub16 r1, r5, r3 2447 @ CHECK: uqsub16 r1, r5, r3 @ encoding: [0x73,0x1f,0x65,0xe6]
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D | basic-thumb2-instructions.s | 2989 uqsub16 r1, r9, r7 2995 @ CHECK: uqsub16 r1, r9, r7 @ encoding: [0xd9,0xfa,0x57,0xf1]
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/external/vixl/src/aarch32/ |
D | assembler-aarch32.h | 3628 void uqsub16(Condition cond, Register rd, Register rn, Register rm); 3629 void uqsub16(Register rd, Register rn, Register rm) { in uqsub16() function 3630 uqsub16(al, rd, rn, rm); in uqsub16()
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D | disasm-aarch32.h | 1285 void uqsub16(Condition cond, Register rd, Register rn, Register rm);
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D | assembler-aarch32.cc | 12301 void Assembler::uqsub16(Condition cond, Register rd, Register rn, Register rm) { in uqsub16() function in vixl::aarch32::Assembler 12318 Delegate(kUqsub16, &Assembler::uqsub16, cond, rd, rn, rm); in uqsub16()
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D | disasm-aarch32.cc | 3543 void Disassembler::uqsub16(Condition cond, in uqsub16() function in vixl::aarch32::Disassembler 21646 uqsub16(CurrentCond(), in DecodeT32() 63820 uqsub16(condition, in DecodeA32()
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D | macro-assembler-aarch32.h | 5176 uqsub16(cond, rd, rn, rm); in Uqsub16()
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/external/llvm/test/MC/ARM/ |
D | basic-thumb2-instructions.s | 3486 uqsub16 r1, r9, r7 3492 @ CHECK: uqsub16 r1, r9, r7 @ encoding: [0xd9,0xfa,0x57,0xf1]
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D | basic-arm-instructions.s | 3360 uqsub16 r1, r5, r3 3365 @ CHECK: uqsub16 r1, r5, r3 @ encoding: [0x73,0x1f,0x65,0xe6]
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/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
D | basic-arm-instructions.txt | 2180 # CHECK: uqsub16 r1, r5, r3
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D | thumb2.txt | 2336 # CHECK: uqsub16 r1, r9, r7
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/external/llvm/test/MC/Disassembler/ARM/ |
D | thumb2.txt | 2487 # CHECK: uqsub16 r1, r9, r7
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D | basic-arm-instructions.txt | 2353 # CHECK: uqsub16 r1, r5, r3
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | ARMInstrThumb2.td | 1950 def t2UQSUB16 : T2I_pam<0b101, 0b0101, "uqsub16">;
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D | ARMInstrInfo.td | 3183 def UQSUB16 : AAI<0b01100110, 0b11110111, "uqsub16">;
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/external/llvm/lib/Target/ARM/ |
D | ARMInstrThumb2.td | 2155 def t2UQSUB16 : T2I_pam<0b101, 0b0101, "uqsub16">;
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D | ARMInstrInfo.td | 3584 def UQSUB16 : AAI<0b01100110, 0b11110111, "uqsub16">;
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