| /external/llvm/test/MC/AArch64/ |
| D | neon-uxtl.s | 20 uxtl2 v0.8h, v1.16b
21 uxtl2 v0.4s, v1.8h
22 uxtl2 v0.2d, v1.4s
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| /external/vixl/src/aarch64/ |
| D | logic-aarch64.cc | 1708 LogicVRegister extendedreg = uxtl2(vform, temp2, src); in ushll2()
2536 LogicVRegister Simulator::uxtl2(VectorFormat vform, in uxtl2() function in vixl::aarch64::Simulator
2860 uxtl2(vform, temp1, src1); in uaddl2()
2861 uxtl2(vform, temp2, src2); in uaddl2()
2883 uxtl2(vform, temp, src2); in uaddw2()
2952 uxtl2(vform, temp1, src1); in usubl2()
2953 uxtl2(vform, temp2, src2); in usubl2()
2975 uxtl2(vform, temp, src2); in usubw2()
3044 uxtl2(vform, temp1, src1); in uabal2()
3045 uxtl2(vform, temp2, src2); in uabal2()
[all …]
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| D | assembler-aarch64.h | 2056 void uxtl2(const VRegister& vd, const VRegister& vn);
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| D | simulator-aarch64.h | 2279 LogicVRegister uxtl2(VectorFormat vform,
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| D | macro-assembler-aarch64.h | 2331 V(uxtl2, Uxtl2) \
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| D | assembler-aarch64.cc | 3696 void Assembler::uxtl2(const VRegister& vd, const VRegister& vn) { in uxtl2() function in vixl::aarch64::Assembler
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.td | 4905 // Vector shift uxtl2 aliases
4906 def : InstAlias<"uxtl2.8h $dst, $src1",
4908 def : InstAlias<"uxtl2 $dst.8h, $src1.16b",
4910 def : InstAlias<"uxtl2.4s $dst, $src1",
4912 def : InstAlias<"uxtl2 $dst.4s, $src1.8h",
4914 def : InstAlias<"uxtl2.2d $dst, $src1",
4916 def : InstAlias<"uxtl2 $dst.2d, $src1.4s",
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| /external/vixl/test/aarch64/ |
| D | test-trace-aarch64.cc | 2473 __ uxtl2(v6.V2D(), v16.V4S()); in GenerateTestSequenceNEON() local
2474 __ uxtl2(v22.V4S(), v20.V8H()); in GenerateTestSequenceNEON() local
2475 __ uxtl2(v20.V8H(), v21.V16B()); in GenerateTestSequenceNEON() local
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| /external/vixl/test/test-trace-reference/ |
| D | log-disasm | 2130 0x~~~~~~~~~~~~~~~~ 6f20a606 uxtl2 v6.2d, v16.4s
2131 0x~~~~~~~~~~~~~~~~ 6f10a696 uxtl2 v22.4s, v20.8h
2132 0x~~~~~~~~~~~~~~~~ 6f08a6b4 uxtl2 v20.8h, v21.16b
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| D | log-disasm-colour | 2130 0x~~~~~~~~~~~~~~~~ 6f20a606 uxtl2 v6.2d, v16.4s
2131 0x~~~~~~~~~~~~~~~~ 6f10a696 uxtl2 v22.4s, v20.8h
2132 0x~~~~~~~~~~~~~~~~ 6f08a6b4 uxtl2 v20.8h, v21.16b
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| D | log-all | 5563 0x~~~~~~~~~~~~~~~~ 6f20a606 uxtl2 v6.2d, v16.4s
5565 0x~~~~~~~~~~~~~~~~ 6f10a696 uxtl2 v22.4s, v20.8h
5567 0x~~~~~~~~~~~~~~~~ 6f08a6b4 uxtl2 v20.8h, v21.16b
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| /external/vixl/doc/aarch64/ |
| D | supported-instructions-aarch64.md | 4603 void uxtl2(const VRegister& vd,
|