Searched refs:v4i32_r (Results 1 – 3 of 3) sorted by relevance
| /external/clang/test/CodeGen/ |
| D | builtins-mips-msa.c | 26 v4i32 v4i32_r; in test() local
60 v4i32_r = __builtin_msa_add_a_w(v4i32_a, v4i32_b); // CHECK: call <4 x i32> @llvm.mips.add.a.w( in test()
65 v4i32_r = __builtin_msa_adds_a_w(v4i32_a, v4i32_b); // CHECK: call <4 x i32> @llvm.mips.adds.a.w( in test()
70 v4i32_r = __builtin_msa_adds_s_w(v4i32_a, v4i32_b); // CHECK: call <4 x i32> @llvm.mips.adds.s.w( in test()
80 v4i32_r = __builtin_msa_addv_w(v4i32_a, v4i32_b); // CHECK: call <4 x i32> @llvm.mips.addv.w( in test()
90 v4i32_r = __builtin_msa_addvi_w(v4i32_a, 25); // CHECK: call <4 x i32> @llvm.mips.addvi.w( in test()
100 v4i32_r = __builtin_msa_and_v(v4i32_a, v4i32_b); // CHECK: call <16 x i8> @llvm.mips.and.v( in test()
105 v4i32_r = __builtin_msa_andi_b(v4i32_a, 25); // CHECK: call <16 x i8> @llvm.mips.andi.b( in test()
115 v4i32_r = __builtin_msa_asub_s_w(v4i32_a, v4i32_b); // CHECK: call <4 x i32> @llvm.mips.asub.s.w( in test()
125 v4i32_r = __builtin_msa_ave_s_w(v4i32_a, v4i32_b); // CHECK: call <4 x i32> @llvm.mips.ave.s.w( in test()
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| D | mips-inline-asm-modifiers.c | 17 v4i32 v4i32_r; in main() local
37 {asm ("ldi.w %w0,1" : "=f" (v4i32_r));} in main()
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| /external/llvm/test/CodeGen/Mips/msa/ |
| D | inline-asm.ll | 5 @v4i32_r = global <4 x i32> zeroinitializer, align 16
12 store <4 x i32> %0, <4 x i32>* @v4i32_r
19 %0 = load <4 x i32>, <4 x i32>* @v4i32_r
22 store <4 x i32> %1, <4 x i32>* @v4i32_r
29 %0 = load <4 x i32>, <4 x i32>* @v4i32_r
32 store <4 x i32> %1, <4 x i32>* @v4i32_r
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