| /external/llvm/test/MC/ARM/ |
| D | neon-cmp-encoding.s | 35 vacge.f32 d16, d16, d17
36 vacge.f32 q8, q8, q9
52 @ CHECK: vacge.f32 d16, d16, d17 @ encoding: [0xb1,0x0e,0x40,0xf3]
53 @ CHECK: vacge.f32 q8, q8, q9 @ encoding: [0xf2,0x0e,0x40,0xf3]
194 @ CHECK: vacge.f32 q9, q12, q11 @ encoding: [0xf6,0x2e,0x48,0xf3]
195 @ CHECK: vacge.f32 d9, d12, d11 @ encoding: [0x1b,0x9e,0x0c,0xf3]
196 @ CHECK: vacge.f32 q11, q12, q11 @ encoding: [0xf6,0x6e,0x48,0xf3]
197 @ CHECK: vacge.f32 d11, d12, d11 @ encoding: [0x1b,0xbe,0x0c,0xf3]
|
| D | fullfp16-neon.s | 144 vacge.f16 d0, d1, d2
145 vacge.f16 q0, q1, q2
146 @ ARM: vacge.f16 d0, d1, d2 @ encoding: [0x12,0x0e,0x11,0xf3]
147 @ ARM: vacge.f16 q0, q1, q2 @ encoding: [0x54,0x0e,0x12,0xf3]
148 @ THUMB: vacge.f16 d0, d1, d2 @ encoding: [0x11,0xff,0x12,0x0e]
149 @ THUMB: vacge.f16 q0, q1, q2 @ encoding: [0x12,0xff,0x54,0x0e]
160 @ ARM: vacge.f16 d0, d2, d1 @ encoding: [0x11,0x0e,0x12,0xf3]
161 @ ARM: vacge.f16 q0, q2, q1 @ encoding: [0x52,0x0e,0x14,0xf3]
162 @ THUMB: vacge.f16 d0, d2, d1 @ encoding: [0x12,0xff,0x11,0x0e]
163 @ THUMB: vacge.f16 q0, q2, q1 @ encoding: [0x14,0xff,0x52,0x0e]
|
| D | fullfp16-neon-neg.s | 106 vacge.f16 d0, d1, d2
107 vacge.f16 q0, q1, q2
|
| D | neon-bitwise-encoding.s | 328 vacge.f32 d5, d30
329 vacge.f32 q5, q3
|
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| D | neon-cmp-encoding.s | 35 vacge.f32 d16, d16, d17
36 vacge.f32 q8, q8, q9
52 @ CHECK: vacge.f32 d16, d16, d17 @ encoding: [0xb1,0x0e,0x40,0xf3]
53 @ CHECK: vacge.f32 q8, q8, q9 @ encoding: [0xf2,0x0e,0x40,0xf3]
|
| /external/llvm/test/CodeGen/ARM/ |
| D | vcge.ll | 145 ;CHECK: vacge.f32
148 %tmp3 = call <2 x i32> @llvm.arm.neon.vacge.v2i32.v2f32(<2 x float> %tmp1, <2 x float> %tmp2)
154 ;CHECK: vacge.f32
157 %tmp3 = call <4 x i32> @llvm.arm.neon.vacge.v4i32.v4f32(<4 x float> %tmp1, <4 x float> %tmp2)
161 declare <2 x i32> @llvm.arm.neon.vacge.v2i32.v2f32(<2 x float>, <2 x float>) nounwind readnone
162 declare <4 x i32> @llvm.arm.neon.vacge.v4i32.v4f32(<4 x float>, <4 x float>) nounwind readnone
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/ARM/ |
| D | vcge.ll | 145 ;CHECK: vacge.f32
154 ;CHECK: vacge.f32
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | fullfp16-neon-arm.txt | 94 # CHECK: vacge.f16 d0, d1, d2
95 # CHECK: vacge.f16 q0, q1, q2
|
| D | fullfp16-neon-thumb.txt | 94 # CHECK: vacge.f16 d0, d1, d2
95 # CHECK: vacge.f16 q0, q1, q2
|
| D | neon.txt | 362 # CHECK: vacge.f32 d16, d16, d17
363 # CHECK: vacge.f32 q8, q8, q9
|
| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 3758 void vacge(
3760 void vacge(DataType dt, DRegister rd, DRegister rn, DRegister rm) { in vacge() function
3761 vacge(al, dt, rd, rn, rm); in vacge()
3764 void vacge(
3766 void vacge(DataType dt, QRegister rd, QRegister rn, QRegister rm) { in vacge() function
3767 vacge(al, dt, rd, rn, rm); in vacge()
|
| D | disasm-aarch32.h | 1349 void vacge(
1352 void vacge(
|
| D | assembler-aarch32.cc | 13044 void Assembler::vacge( in vacge() function in vixl::aarch32::Assembler
13068 Delegate(kVacge, &Assembler::vacge, cond, dt, rd, rn, rm); in vacge()
13071 void Assembler::vacge( in vacge() function in vixl::aarch32::Assembler
13095 Delegate(kVacge, &Assembler::vacge, cond, dt, rd, rn, rm); in vacge()
|
| D | disasm-aarch32.cc | 3797 void Disassembler::vacge( in vacge() function in vixl::aarch32::Disassembler
3808 void Disassembler::vacge( in vacge() function in vixl::aarch32::Disassembler
30377 vacge(CurrentCond(), in DecodeT32()
31178 vacge(CurrentCond(), in DecodeT32()
40761 vacge(al, F32, DRegister(rd), DRegister(rn), DRegister(rm)); in DecodeA32()
40800 vacge(al, F32, QRegister(rd), QRegister(rn), QRegister(rm)); in DecodeA32()
|
| D | macro-assembler-aarch32.h | 5494 vacge(cond, dt, rd, rn, rm); in Vacge()
5509 vacge(cond, dt, rd, rn, rm); in Vacge()
|
| /external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
| D | neon.txt | 362 # CHECK: vacge.f32 d16, d16, d17
363 # CHECK: vacge.f32 q8, q8, q9
|
| /external/clang/include/clang/Basic/ |
| D | arm_neon.td | 558 let InstName = "vacge" in {
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMInstrNEON.td | 4776 def VACGEfd : N3VDInt<1, 0, 0b00, 0b1110, 1, N3RegFrm, IIC_VBIND, "vacge",
4778 def VACGEfq : N3VQInt<1, 0, 0b00, 0b1110, 1, N3RegFrm, IIC_VBINQ, "vacge",
4780 def VACGEhd : N3VDInt<1, 0, 0b01, 0b1110, 1, N3RegFrm, IIC_VBIND, "vacge",
4783 def VACGEhq : N3VQInt<1, 0, 0b01, 0b1110, 1, N3RegFrm, IIC_VBINQ, "vacge",
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMInstrNEON.td | 3704 def VACGEd : N3VDInt<1, 0, 0b00, 0b1110, 1, N3RegFrm, IIC_VBIND, "vacge",
3706 def VACGEq : N3VQInt<1, 0, 0b00, 0b1110, 1, N3RegFrm, IIC_VBINQ, "vacge",
|
| /external/swiftshader/third_party/llvm-subzero/build/Android/include/llvm/IR/ |
| D | Intrinsics.gen | 574 arm_neon_vacge, // llvm.arm.neon.vacge
6632 "llvm.arm.neon.vacge",
14572 1, // llvm.arm.neon.vacge
|
| /external/swiftshader/third_party/llvm-subzero/build/MacOS/include/llvm/IR/ |
| D | Intrinsics.gen | 569 arm_neon_vacge, // llvm.arm.neon.vacge
6593 "llvm.arm.neon.vacge",
14478 1, // llvm.arm.neon.vacge
|
| /external/swiftshader/third_party/llvm-subzero/build/Windows/include/llvm/IR/ |
| D | Intrinsics.gen | 574 arm_neon_vacge, // llvm.arm.neon.vacge
6632 "llvm.arm.neon.vacge",
14572 1, // llvm.arm.neon.vacge
|
| /external/swiftshader/third_party/llvm-subzero/build/Linux/include/llvm/IR/ |
| D | Intrinsics.gen | 574 arm_neon_vacge, // llvm.arm.neon.vacge
6632 "llvm.arm.neon.vacge",
14572 1, // llvm.arm.neon.vacge
|