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Searched refs:var16 (Results 1 – 12 of 12) sorted by relevance

/external/llvm/test/CodeGen/AArch64/
Dcode-model-large-abs.ll4 @var16 = global i16 0
32 %val = load i16, i16* @var16
34 ; CHECK: movz x[[ADDR_REG:[0-9]+]], #:abs_g3:var16
35 ; CHECK: movk x[[ADDR_REG]], #:abs_g2_nc:var16
36 ; CHECK: movk x[[ADDR_REG]], #:abs_g1_nc:var16
37 ; CHECK: movk x[[ADDR_REG]], #:abs_g0_nc:var16
Darm64-code-model-large-abs.ll4 @var16 = global i16 0
32 %val = load i16, i16* @var16
34 ; CHECK: movz x[[ADDR_REG:[0-9]+]], #:abs_g3:var16
35 ; CHECK: movk x[[ADDR_REG]], #:abs_g2_nc:var16
36 ; CHECK: movk x[[ADDR_REG]], #:abs_g1_nc:var16
37 ; CHECK: movk x[[ADDR_REG]], #:abs_g0_nc:var16
Darm64-elf-globals.ll7 @var16 = external global i16, align 2
34 %val = load i16, i16* @var16, align 2
35 store i16 %new, i16* @var16
38 ; CHECK: adrp x[[HIREG:[0-9]+]], var16
39 ; CHECK: ldrh {{w[0-9]+}}, [x[[HIREG]], :lo12:var16]
40 ; CHECK: strh {{w[0-9]+}}, [x[[HIREG]], :lo12:var16]
42 ; CHECK-FAST: adrp x[[HIREG:[0-9]+]], var16
43 ; CHECK-FAST: ldrh {{w[0-9]+}}, [x[[HIREG]], :lo12:var16]
Datomic-ops.ll11 @var16 = global i16 0
37 %old = atomicrmw add i16* @var16, i16 %offset acquire
39 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
40 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
117 %old = atomicrmw sub i16* @var16, i16 %offset release
119 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
120 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
197 %old = atomicrmw and i16* @var16, i16 %offset monotonic
199 ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16
200 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var16
[all …]
Daddsub_ext.ll4 @var16 = global i16 0
143 %val16_tmp = load i16, i16* @var16
218 %val16_tmp = load i16, i16* @var16
/external/llvm/test/MC/AArch64/
Delf-globaladdress.ll10 @var16 = global i16 0
18 %val16 = load i16, i16* @var16
19 store volatile i16 %val16, i16* @var16
46 ; OBJ: 0x{{[0-9,A-F]+}} R_AARCH64_ADR_PREL_PG_HI21 var16
47 ; OBJ: 0x{{[0-9,A-F]+}} R_AARCH64_LDST16_ABS_LO12_NC var16
/external/llvm/test/CodeGen/ARM/
Dpreferred-align.ll18 @var16 = global i16 zeroinitializer
20 ; CHECK: .globl var16
Datomic-ops-v8.ll7 @var16 = global i16 0
36 %old = atomicrmw add i16* @var16, i16 %offset acquire
39 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var16
40 ; CHECK: movt r[[ADDR]], :upper16:var16
132 %old = atomicrmw sub i16* @var16, i16 %offset release
135 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var16
136 ; CHECK: movt r[[ADDR]], :upper16:var16
228 %old = atomicrmw and i16* @var16, i16 %offset monotonic
231 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var16
232 ; CHECK: movt r[[ADDR]], :upper16:var16
[all …]
/external/llvm/test/CodeGen/PowerPC/
Dfloat-asmprint.ll11 @var16 = global half -0.0, align 2
31 ; CHECK: var16:
/external/llvm/test/CodeGen/X86/
Dfloat-asmprint.ll11 @var16 = global half -0.0, align 2
40 ; CHECK: var16:
Dbswap.ll80 @var16 = global i16 0
94 %init = load i16, i16* @var16
143 %init = load i16, i16* @var16
/external/libvpx/libvpx/vp9/encoder/
Dvp9_encodeframe.c4236 diff *var16 = cpi->source_diff_var; in set_var_thresh_from_histogram() local
4250 &var16->sse, &var16->sum); in set_var_thresh_from_histogram()
4254 &var16->sse, &var16->sum); in set_var_thresh_from_histogram()
4258 &var16->sse, &var16->sum); in set_var_thresh_from_histogram()
4267 vpx_get16x16var(src, src_stride, last_src, last_stride, &var16->sse, in set_var_thresh_from_histogram()
4268 &var16->sum); in set_var_thresh_from_histogram()
4271 vpx_get16x16var(src, src_stride, last_src, last_stride, &var16->sse, in set_var_thresh_from_histogram()
4272 &var16->sum); in set_var_thresh_from_histogram()
4274 var16->var = var16->sse - (((uint32_t)var16->sum * var16->sum) >> 8); in set_var_thresh_from_histogram()
4276 if (var16->var >= VAR_HIST_MAX_BG_VAR) in set_var_thresh_from_histogram()
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