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/external/swiftshader/third_party/LLVM/test/MC/ARM/
Dsimple-fp-encoding.s235 @ CHECK: vcvtr.s32.f64 s0, d0 @ encoding: [0x40,0x0b,0xbd,0xee]
236 @ CHECK: vcvtr.s32.f32 s0, s1 @ encoding: [0x60,0x0a,0xbd,0xee]
237 @ CHECK: vcvtr.u32.f64 s0, d0 @ encoding: [0x40,0x0b,0xbc,0xee]
238 @ CHECK: vcvtr.u32.f32 s0, s1 @ encoding: [0x60,0x0a,0xbc,0xee]
239 vcvtr.s32.f64 s0, d0
240 vcvtr.s32.f32 s0, s1
241 vcvtr.u32.f64 s0, d0
242 vcvtr.u32.f32 s0, s1
/external/llvm/test/MC/ARM/
Dsimple-fp-encoding.s314 @ CHECK: vcvtr.s32.f64 s0, d0 @ encoding: [0x40,0x0b,0xbd,0xee]
315 @ CHECK: vcvtr.s32.f32 s0, s1 @ encoding: [0x60,0x0a,0xbd,0xee]
316 @ CHECK: vcvtr.u32.f64 s0, d0 @ encoding: [0x40,0x0b,0xbc,0xee]
317 @ CHECK: vcvtr.u32.f32 s0, s1 @ encoding: [0x60,0x0a,0xbc,0xee]
318 vcvtr.s32.f64 s0, d0
319 vcvtr.s32.f32 s0, s1
320 vcvtr.u32.f64 s0, d0
321 vcvtr.u32.f32 s0, s1
Dfullfp16.s81 vcvtr.s32.f16 s0, s1
82 vcvtr.u32.f16 s0, s1
83 @ ARM: vcvtr.s32.f16 s0, s1 @ encoding: [0x60,0x09,0xbd,0xee]
84 @ ARM: vcvtr.u32.f16 s0, s1 @ encoding: [0x60,0x09,0xbc,0xee]
85 @ THUMB: vcvtr.s32.f16 s0, s1 @ encoding: [0xbd,0xee,0x60,0x09]
86 @ THUMB: vcvtr.u32.f16 s0, s1 @ encoding: [0xbc,0xee,0x60,0x09]
Dsingle-precision-fp.s82 vcvtr.s32.f64 s1, d0
83 vcvtr.u32.f64 s1, d2
101 @ CHECK-ERRORS-NEXT: vcvtr.s32.f64 s1, d0
103 @ CHECK-ERRORS-NEXT: vcvtr.u32.f64 s1, d2
Dfullfp16-neg.s61 vcvtr.s32.f16 s0, s1
62 vcvtr.u32.f16 s0, s1
/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/
Dfp-encoding.txt210 # CHECK: vcvtr.s32.f64 s0, d0
211 # CHECK: vcvtr.s32.f32 s0, s1
212 # CHECK: vcvtr.u32.f64 s0, d0
213 # CHECK: vcvtr.u32.f32 s0, s1
/external/llvm/test/MC/Disassembler/ARM/
Dfp-encoding.txt259 # CHECK: vcvtr.s32.f64 s0, d0
260 # CHECK: vcvtr.s32.f32 s0, s1
261 # CHECK: vcvtr.u32.f64 s0, d0
262 # CHECK: vcvtr.u32.f32 s0, s1
Dfullfp16-arm.txt60 # CHECK: vcvtr.s32.f16 s0, s1
61 # CHECK: vcvtr.u32.f16 s0, s1
Dfullfp16-thumb.txt60 # CHECK: vcvtr.s32.f16 s0, s1
61 # CHECK: vcvtr.u32.f16 s0, s1
/external/llvm/lib/Target/ARM/
DARMInstrVFP.td1475 IIC_fpCVTDI, "vcvtr", ".s32.f64\t$Sd, $Dm",
1482 IIC_fpCVTSI, "vcvtr", ".s32.f32\t$Sd, $Sm",
1489 IIC_fpCVTHI, "vcvtr", ".s32.f16\t$Sd, $Sm",
1496 IIC_fpCVTDI, "vcvtr", ".u32.f64\t$Sd, $Dm",
1503 IIC_fpCVTSI, "vcvtr", ".u32.f32\t$Sd, $Sm",
1510 IIC_fpCVTHI, "vcvtr", ".u32.f16\t$Sd, $Sm",
2222 def : VFP2MnemonicAlias<"ftosid", "vcvtr.s32.f64">;
2224 def : VFP2MnemonicAlias<"ftosis", "vcvtr.s32.f32">;
2226 def : VFP2MnemonicAlias<"ftouid", "vcvtr.u32.f64">;
2228 def : VFP2MnemonicAlias<"ftouis", "vcvtr.u32.f32">;
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DARMInstrVFP.td759 IIC_fpCVTDI, "vcvtr", ".s32.f64\t$Sd, $Dm",
766 IIC_fpCVTSI, "vcvtr", ".s32.f32\t$Sd, $Sm",
773 IIC_fpCVTDI, "vcvtr", ".u32.f64\t$Sd, $Dm",
780 IIC_fpCVTSI, "vcvtr", ".u32.f32\t$Sd, $Sm",
/external/vixl/src/aarch32/
Dassembler-aarch32.h4267 void vcvtr(
4269 void vcvtr(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { in vcvtr() function
4270 vcvtr(al, dt1, dt2, rd, rm); in vcvtr()
4273 void vcvtr(
4275 void vcvtr(DataType dt1, DataType dt2, SRegister rd, DRegister rm) { in vcvtr() function
4276 vcvtr(al, dt1, dt2, rd, rm); in vcvtr()
Ddisasm-aarch32.h1634 void vcvtr(
1637 void vcvtr(
Ddisasm-aarch32.cc4677 void Disassembler::vcvtr( in vcvtr() function in vixl::aarch32::Disassembler
4684 void Disassembler::vcvtr( in vcvtr() function in vixl::aarch32::Disassembler
24063 vcvtr(CurrentCond(), in DecodeT32()
24091 vcvtr(CurrentCond(), in DecodeT32()
24464 vcvtr(CurrentCond(), in DecodeT32()
24492 vcvtr(CurrentCond(), in DecodeT32()
66856 vcvtr(condition, in DecodeA32()
66890 vcvtr(condition, in DecodeA32()
67325 vcvtr(condition, in DecodeA32()
67359 vcvtr(condition, in DecodeA32()
Dassembler-aarch32.cc15944 void Assembler::vcvtr( in vcvtr() function in vixl::aarch32::Assembler
15975 Delegate(kVcvtr, &Assembler::vcvtr, cond, dt1, dt2, rd, rm); in vcvtr()
15978 void Assembler::vcvtr( in vcvtr() function in vixl::aarch32::Assembler
16009 Delegate(kVcvtr, &Assembler::vcvtr, cond, dt1, dt2, rd, rm); in vcvtr()
Dmacro-assembler-aarch32.h6722 vcvtr(cond, dt1, dt2, rd, rm); in Vcvtr()
6736 vcvtr(cond, dt1, dt2, rd, rm); in Vcvtr()
/external/swiftshader/third_party/llvm-subzero/build/Android/include/llvm/IR/
DIntrinsics.gen696 arm_vcvtr, // llvm.arm.vcvtr
6754 "llvm.arm.vcvtr",
14694 1, // llvm.arm.vcvtr
/external/swiftshader/third_party/llvm-subzero/build/MacOS/include/llvm/IR/
DIntrinsics.gen690 arm_vcvtr, // llvm.arm.vcvtr
6714 "llvm.arm.vcvtr",
14599 1, // llvm.arm.vcvtr
/external/swiftshader/third_party/llvm-subzero/build/Windows/include/llvm/IR/
DIntrinsics.gen696 arm_vcvtr, // llvm.arm.vcvtr
6754 "llvm.arm.vcvtr",
14694 1, // llvm.arm.vcvtr
/external/swiftshader/third_party/llvm-subzero/build/Linux/include/llvm/IR/
DIntrinsics.gen696 arm_vcvtr, // llvm.arm.vcvtr
6754 "llvm.arm.vcvtr",
14694 1, // llvm.arm.vcvtr