/external/llvm/test/MC/ARM/ |
D | neon-vcvt-fp16.s | 6 @ CHECK-FP16: vcvtt.f32.f16 s7, s1 @ encoding: [0xe0,0x3a,0xf2,0xee] 8 vcvtt.f32.f16 s7, s1 9 @ CHECK-FP16: vcvtt.f16.f32 s1, s7 @ encoding: [0xe3,0x0a,0xf3,0xee] 11 vcvtt.f16.f32 s1, s7
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D | invalid-fp-armv8.s | 5 vcvtt.f64.f16 d3, s1 6 @ V7-NOT: vcvtt.f64.f16 d3, s1 @ encoding: [0xe0,0x3b,0xb2,0xee] 7 vcvtt.f16.f64 s5, d12 8 @ V7-NOT: vcvtt.f16.f64 s5, d12 @ encoding: [0xcc,0x2b,0xf3,0xee]
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D | thumb-fp-armv8.s | 5 vcvtt.f64.f16 d3, s1 6 @ CHECK: vcvtt.f64.f16 d3, s1 @ encoding: [0xb2,0xee,0xe0,0x3b] 7 vcvtt.f16.f64 s5, d12 8 @ CHECK: vcvtt.f16.f64 s5, d12 @ encoding: [0xf3,0xee,0xcc,0x2b]
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D | fp-armv8.s | 5 vcvtt.f64.f16 d3, s1 6 @ CHECK: vcvtt.f64.f16 d3, s1 @ encoding: [0xe0,0x3b,0xb2,0xee] 7 vcvtt.f16.f64 s5, d12 8 @ CHECK: vcvtt.f16.f64 s5, d12 @ encoding: [0xcc,0x2b,0xf3,0xee]
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D | directive-arch_extension-fp.s | 52 vcvtt.f64.f16 d0, s0 54 vcvtt.f16.f64 s0, d0 188 vcvtt.f64.f16 d0, s0 190 vcvtt.f16.f64 s0, d0
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/external/llvm/test/tools/llvm-objdump/ARM/ |
D | macho-mattr-arm.test | 3 vcvtt.f64.f16 d3, s1 5 @ CHECK: e0 3b b2 ee vcvtt.f64.f16 d3, s1
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/external/llvm/test/MC/Disassembler/ARM/ |
D | invalid-because-armv7.txt | 7 # Would be vcvtt.f64.f16 d3, s1
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D | fp-armv8.txt | 4 # CHECK: vcvtt.f64.f16 d3, s1 7 # CHECK: vcvtt.f16.f64 s5, d12
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D | thumb-fp-armv8.txt | 4 # CHECK: vcvtt.f64.f16 d3, s1 7 # CHECK: vcvtt.f16.f64 s5, d12
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/external/vixl/src/aarch32/ |
D | assembler-aarch32.h | 4279 void vcvtt( 4281 void vcvtt(DataType dt1, DataType dt2, SRegister rd, SRegister rm) { in vcvtt() function 4282 vcvtt(al, dt1, dt2, rd, rm); in vcvtt() 4285 void vcvtt( 4287 void vcvtt(DataType dt1, DataType dt2, DRegister rd, SRegister rm) { in vcvtt() function 4288 vcvtt(al, dt1, dt2, rd, rm); in vcvtt() 4291 void vcvtt( 4293 void vcvtt(DataType dt1, DataType dt2, SRegister rd, DRegister rm) { in vcvtt() function 4294 vcvtt(al, dt1, dt2, rd, rm); in vcvtt()
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D | disasm-aarch32.h | 1640 void vcvtt( 1643 void vcvtt( 1646 void vcvtt(
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D | disasm-aarch32.cc | 4691 void Disassembler::vcvtt( in vcvtt() function in vixl::aarch32::Disassembler 4698 void Disassembler::vcvtt( in vcvtt() function in vixl::aarch32::Disassembler 4705 void Disassembler::vcvtt( in vcvtt() function in vixl::aarch32::Disassembler 23842 vcvtt(CurrentCond(), in DecodeT32() 23870 vcvtt(CurrentCond(), in DecodeT32() 24243 vcvtt(CurrentCond(), in DecodeT32() 24271 vcvtt(CurrentCond(), in DecodeT32() 66602 vcvtt(condition, in DecodeA32() 66636 vcvtt(condition, in DecodeA32() 67071 vcvtt(condition, in DecodeA32() [all …]
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D | assembler-aarch32.cc | 16012 void Assembler::vcvtt( in vcvtt() function in vixl::aarch32::Assembler 16043 Delegate(kVcvtt, &Assembler::vcvtt, cond, dt1, dt2, rd, rm); in vcvtt() 16046 void Assembler::vcvtt( in vcvtt() function in vixl::aarch32::Assembler 16065 Delegate(kVcvtt, &Assembler::vcvtt, cond, dt1, dt2, rd, rm); in vcvtt() 16068 void Assembler::vcvtt( in vcvtt() function in vixl::aarch32::Assembler 16087 Delegate(kVcvtt, &Assembler::vcvtt, cond, dt1, dt2, rd, rm); in vcvtt()
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D | macro-assembler-aarch32.h | 6750 vcvtt(cond, dt1, dt2, rd, rm); in Vcvtt() 6764 vcvtt(cond, dt1, dt2, rd, rm); in Vcvtt() 6778 vcvtt(cond, dt1, dt2, rd, rm); in Vcvtt()
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/external/llvm/lib/Target/ARM/ |
D | ARMInstrVFP.td | 678 /* FIXME */ IIC_fpCVTSH, "vcvtt", ".f32.f16\t$Sd, $Sm", 683 /* FIXME */ IIC_fpCVTHS, "vcvtt", ".f16.f32\t$Sd, $Sm", 716 NoItinerary, "vcvtt", ".f64.f16\t$Dd, $Sm", 728 NoItinerary, "vcvtt", ".f16.f64\t$Sd, $Dm",
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | ARMInstrVFP.td | 419 /* FIXME */ IIC_fpCVTSH, "vcvtt", ".f32.f16\t$Sd, $Sm", 423 /* FIXME */ IIC_fpCVTHS, "vcvtt", ".f16.f32\t$Sd, $Sm",
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