Searched refs:virtReg (Results 1 – 6 of 6) sorted by relevance
171 bool hasPhys(unsigned virtReg) const { in hasPhys() argument172 return getPhys(virtReg) != NO_PHYS_REG; in hasPhys()177 unsigned getPhys(unsigned virtReg) const { in getPhys() argument178 assert(TargetRegisterInfo::isVirtualRegister(virtReg)); in getPhys()179 return Virt2PhysMap[virtReg]; in getPhys()184 void assignVirt2Phys(unsigned virtReg, unsigned physReg) { in assignVirt2Phys() argument185 assert(TargetRegisterInfo::isVirtualRegister(virtReg) && in assignVirt2Phys()187 assert(Virt2PhysMap[virtReg] == NO_PHYS_REG && in assignVirt2Phys()190 Virt2PhysMap[virtReg] = physReg; in assignVirt2Phys()195 void clearVirt(unsigned virtReg) { in clearVirt() argument[all …]
118 unsigned VirtRegMap::getRegAllocPref(unsigned virtReg) { in getRegAllocPref() argument119 std::pair<unsigned, unsigned> Hint = MRI->getRegAllocationHint(virtReg); in getRegAllocPref()129 int VirtRegMap::assignVirt2StackSlot(unsigned virtReg) { in assignVirt2StackSlot() argument130 assert(TargetRegisterInfo::isVirtualRegister(virtReg)); in assignVirt2StackSlot()131 assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT && in assignVirt2StackSlot()133 const TargetRegisterClass* RC = MF->getRegInfo().getRegClass(virtReg); in assignVirt2StackSlot()134 return Virt2StackSlotMap[virtReg] = createSpillSlot(RC); in assignVirt2StackSlot()137 void VirtRegMap::assignVirt2StackSlot(unsigned virtReg, int SS) { in assignVirt2StackSlot() argument138 assert(TargetRegisterInfo::isVirtualRegister(virtReg)); in assignVirt2StackSlot()139 assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT && in assignVirt2StackSlot()[all …]
154 LiveInterval &virtReg() const { in virtReg() function
92 bool hasPhys(unsigned virtReg) const { in hasPhys() argument93 return getPhys(virtReg) != NO_PHYS_REG; in hasPhys()98 unsigned getPhys(unsigned virtReg) const { in getPhys() argument99 assert(TargetRegisterInfo::isVirtualRegister(virtReg)); in getPhys()100 return Virt2PhysMap[virtReg]; in getPhys()105 void assignVirt2Phys(unsigned virtReg, unsigned physReg) { in assignVirt2Phys() argument106 assert(TargetRegisterInfo::isVirtualRegister(virtReg) && in assignVirt2Phys()108 assert(Virt2PhysMap[virtReg] == NO_PHYS_REG && in assignVirt2Phys()111 Virt2PhysMap[virtReg] = physReg; in assignVirt2Phys()116 void clearVirt(unsigned virtReg) { in clearVirt() argument[all …]
155 LiveInterval &virtReg() const { in virtReg() function
100 int VirtRegMap::assignVirt2StackSlot(unsigned virtReg) { in assignVirt2StackSlot() argument101 assert(TargetRegisterInfo::isVirtualRegister(virtReg)); in assignVirt2StackSlot()102 assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT && in assignVirt2StackSlot()104 const TargetRegisterClass* RC = MF->getRegInfo().getRegClass(virtReg); in assignVirt2StackSlot()105 return Virt2StackSlotMap[virtReg] = createSpillSlot(RC); in assignVirt2StackSlot()108 void VirtRegMap::assignVirt2StackSlot(unsigned virtReg, int SS) { in assignVirt2StackSlot() argument109 assert(TargetRegisterInfo::isVirtualRegister(virtReg)); in assignVirt2StackSlot()110 assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT && in assignVirt2StackSlot()115 Virt2StackSlotMap[virtReg] = SS; in assignVirt2StackSlot()