| /external/llvm/test/MC/ARM/ |
| D | thumb-fp-armv8.s | 79 vselvs.f32 s21, s16, s14
80 @ CHECK: vselvs.f32 s21, s16, s14 @ encoding: [0x58,0xfe,0x07,0xaa]
81 vselvs.f64 d0, d1, d31
82 @ CHECK: vselvs.f64 d0, d1, d31 @ encoding: [0x11,0xfe,0x2f,0x0b]
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| D | fp-armv8.s | 76 vselvs.f32 s21, s16, s14
77 @ CHECK: vselvs.f32 s21, s16, s14 @ encoding: [0x07,0xaa,0x58,0xfe]
78 vselvs.f64 d0, d1, d31
79 @ CHECK: vselvs.f64 d0, d1, d31 @ encoding: [0x2f,0x0b,0x11,0xfe]
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| D | directive-arch_extension-fp.s | 28 vselvs.f32 s0, s0, s0
41 vselvs.f64 d0, d0, d0
164 vselvs.f32 s0, s0, s0
177 vselvs.f64 d0, d0, d0
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| D | fullfp16.s | 157 vselvs.f16 s21, s16, s14
158 @ ARM: vselvs.f16 s21, s16, s14 @ encoding: [0x07,0xa9,0x58,0xfe]
159 @ THUMB: vselvs.f16 s21, s16, s14 @ encoding: [0x58,0xfe,0x07,0xa9]
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| D | fullfp16-neg.s | 116 vselvs.f16 s21, s16, s14
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| /external/llvm/test/MC/Disassembler/ARM/ |
| D | fp-armv8.txt | 96 # CHECK: vselvs.f32 s21, s16, s14
99 # CHECK: vselvs.f64 d0, d1, d31
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| D | thumb-fp-armv8.txt | 100 # CHECK: vselvs.f32 s21, s16, s14
103 # CHECK: vselvs.f64 d0, d1, d31
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| D | fullfp16-arm.txt | 115 # CHECK: vselvs.f16 s21, s16, s14
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| D | fullfp16-thumb.txt | 115 # CHECK: vselvs.f16 s21, s16, s14
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| /external/llvm/test/CodeGen/ARM/ |
| D | vsel.ll | 262 ; CHECK: vselvs.f32 s0, s3, s2
271 ; CHECK: vselvs.f64 d16, d2, d1
298 ; CHECK: vselvs.f32 s0, s2, s3
307 ; CHECK: vselvs.f64 d16, d1, d2
|
| /external/vixl/src/aarch32/ |
| D | disasm-aarch32.h | 2307 void vselvs(DataType dt, DRegister rd, DRegister rn, DRegister rm);
2309 void vselvs(DataType dt, SRegister rd, SRegister rn, SRegister rm);
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| D | assembler-aarch32.h | 5623 void vselvs(DataType dt, DRegister rd, DRegister rn, DRegister rm);
5625 void vselvs(DataType dt, SRegister rd, SRegister rn, SRegister rm);
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| D | assembler-aarch32.cc | 23999 void Assembler::vselvs(DataType dt, DRegister rd, DRegister rn, DRegister rm) { in vselvs() function in vixl::aarch32::Assembler
24018 Delegate(kVselvs, &Assembler::vselvs, dt, rd, rn, rm); in vselvs()
24021 void Assembler::vselvs(DataType dt, SRegister rd, SRegister rn, SRegister rm) { in vselvs() function in vixl::aarch32::Assembler
24040 Delegate(kVselvs, &Assembler::vselvs, dt, rd, rn, rm); in vselvs()
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| D | disasm-aarch32.cc | 6537 void Disassembler::vselvs(DataType dt, in vselvs() function in vixl::aarch32::Disassembler
6545 void Disassembler::vselvs(DataType dt, in vselvs() function in vixl::aarch32::Disassembler
24598 vselvs(F32, in DecodeT32()
24610 vselvs(F64, in DecodeT32()
55733 vselvs(F32, SRegister(rd), SRegister(rn), SRegister(rm)); in DecodeA32()
55742 vselvs(F64, DRegister(rd), DRegister(rn), DRegister(rm)); in DecodeA32()
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| D | macro-assembler-aarch32.h | 9759 vselvs(dt, rd, rn, rm); in Vselvs()
9769 vselvs(dt, rd, rn, rm); in Vselvs()
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