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Searched refs:vshll (Results 1 – 23 of 23) sorted by relevance

/external/swiftshader/third_party/LLVM/test/MC/ARM/
Dneont2-shift-encoding.s69 @ CHECK: vshll.s8 q8, d16, #7 @ encoding: [0xcf,0xef,0x30,0x0a]
70 vshll.s8 q8, d16, #7
71 @ CHECK: vshll.s16 q8, d16, #15 @ encoding: [0xdf,0xef,0x30,0x0a]
72 vshll.s16 q8, d16, #15
73 @ CHECK: vshll.s32 q8, d16, #31 @ encoding: [0xff,0xef,0x30,0x0a]
74 vshll.s32 q8, d16, #31
75 @ CHECK: vshll.u8 q8, d16, #7 @ encoding: [0xcf,0xff,0x30,0x0a]
76 vshll.u8 q8, d16, #7
77 @ CHECK: vshll.u16 q8, d16, #15 @ encoding: [0xdf,0xff,0x30,0x0a]
78 vshll.u16 q8, d16, #15
[all …]
Dneon-shift-encoding.s132 @ CHECK: vshll.s8 q8, d16, #7 @ encoding: [0x30,0x0a,0xcf,0xf2]
133 vshll.s8 q8, d16, #7
134 @ CHECK: vshll.s16 q8, d16, #15 @ encoding: [0x30,0x0a,0xdf,0xf2]
135 vshll.s16 q8, d16, #15
136 @ CHECK: vshll.s32 q8, d16, #31 @ encoding: [0x30,0x0a,0xff,0xf2]
137 vshll.s32 q8, d16, #31
138 @ CHECK: vshll.u8 q8, d16, #7 @ encoding: [0x30,0x0a,0xcf,0xf3]
139 vshll.u8 q8, d16, #7
140 @ CHECK: vshll.u16 q8, d16, #15 @ encoding: [0x30,0x0a,0xdf,0xf3]
141 vshll.u16 q8, d16, #15
[all …]
/external/llvm/test/MC/ARM/
Dneont2-shift-encoding.s69 @ CHECK: vshll.s8 q8, d16, #7 @ encoding: [0xcf,0xef,0x30,0x0a]
70 vshll.s8 q8, d16, #7
71 @ CHECK: vshll.s16 q8, d16, #15 @ encoding: [0xdf,0xef,0x30,0x0a]
72 vshll.s16 q8, d16, #15
73 @ CHECK: vshll.s32 q8, d16, #31 @ encoding: [0xff,0xef,0x30,0x0a]
74 vshll.s32 q8, d16, #31
75 @ CHECK: vshll.u8 q8, d16, #7 @ encoding: [0xcf,0xff,0x30,0x0a]
76 vshll.u8 q8, d16, #7
77 @ CHECK: vshll.u16 q8, d16, #15 @ encoding: [0xdf,0xff,0x30,0x0a]
78 vshll.u16 q8, d16, #15
[all …]
Dneon-shift-encoding.s253 vshll.s8 q8, d16, #7
254 vshll.s16 q8, d16, #15
255 vshll.s32 q8, d16, #31
256 vshll.u8 q8, d16, #7
257 vshll.u16 q8, d16, #15
258 vshll.u32 q8, d16, #31
259 vshll.i8 q8, d16, #8
260 vshll.i16 q8, d16, #16
261 vshll.i32 q8, d16, #32
263 @ CHECK: vshll.s8 q8, d16, #7 @ encoding: [0x30,0x0a,0xcf,0xf2]
[all …]
/external/swiftshader/third_party/LLVM/test/CodeGen/ARM/
Dvshll.ll5 ;CHECK: vshll.s8
13 ;CHECK: vshll.s16
21 ;CHECK: vshll.s32
29 ;CHECK: vshll.u8
37 ;CHECK: vshll.u16
45 ;CHECK: vshll.u32
55 ;CHECK: vshll.i8
63 ;CHECK: vshll.i16
71 ;CHECK: vshll.i32
/external/llvm/test/CodeGen/ARM/
Dvshll.ll5 ;CHECK: vshll.s8
14 ;CHECK: vshll.s16
23 ;CHECK: vshll.s32
32 ;CHECK: vshll.u8
41 ;CHECK: vshll.u16
50 ;CHECK: vshll.u32
61 ;CHECK: vshll.i8
70 ;CHECK: vshll.i16
79 ;CHECK: vshll.i32
/external/arm-neon-tests/
Dref_vshll_n.c40 vshll##_n_##T2##W(VECT_VAR(vector, T1, W, N), \ in exec_vshll_n()
/external/libavc/common/arm/
Dih264_deblk_luma_a9.s151 vshll.u8 q13, d9, #1 @
153 vshll.u8 q8, d8, #1 @Q13,Q8 = (p1<<1)
157 vshll.u8 q8, d2, #1 @
158 vshll.u8 q13, d3, #1 @Q13,Q8 = (q1<<1)
/external/boringssl/src/crypto/poly1305/
Dpoly1305_arm_asm.S513 # asm 1: vshll.u32 >r3=reg128#5,<c23=reg128#2%top,#18
514 # asm 2: vshll.u32 >r3=q4,<c23=d3,#18
515 vshll.u32 q4,d3,#18
573 # asm 1: vshll.u32 >r2=reg128#14,<c01=reg128#1%top,#12
574 # asm 2: vshll.u32 >r2=q13,<c01=d1,#12
575 vshll.u32 q13,d1,#12
613 # asm 1: vshll.u32 >r1=reg128#15,<c23=reg128#2%bot,#6
614 # asm 2: vshll.u32 >r1=q14,<c23=d2,#6
615 vshll.u32 q14,d2,#6
1238 # asm 1: vshll.u32 >r3=reg128#6,<c23=reg128#14%top,#18
[all …]
/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/
Dneon-tests.txt51 # CHECK: vshll.i16 q3, d1, #16
Dneont2.txt1084 # CHECK: vshll.s8 q8, d16, #7
1086 # CHECK: vshll.s16 q8, d16, #15
1088 # CHECK: vshll.s32 q8, d16, #31
1090 # CHECK: vshll.u8 q8, d16, #7
1092 # CHECK: vshll.u16 q8, d16, #15
1094 # CHECK: vshll.u32 q8, d16, #31
1096 # CHECK: vshll.i8 q8, d16, #8
1098 # CHECK: vshll.i16 q8, d16, #16
1100 # CHECK: vshll.i32 q8, d16, #32
Dneon.txt1261 # CHECK: vshll.s8 q8, d16, #7
1263 # CHECK: vshll.s16 q8, d16, #15
1265 # CHECK: vshll.s32 q8, d16, #31
1267 # CHECK: vshll.u8 q8, d16, #7
1269 # CHECK: vshll.u16 q8, d16, #15
1271 # CHECK: vshll.u32 q8, d16, #31
1273 # CHECK: vshll.i8 q8, d16, #8
1275 # CHECK: vshll.i16 q8, d16, #16
1277 # CHECK: vshll.i32 q8, d16, #32
/external/llvm/test/MC/Disassembler/ARM/
Dneon-tests.txt51 # CHECK: vshll.i16 q3, d1, #16
Dneont2.txt1084 # CHECK: vshll.s8 q8, d16, #7
1086 # CHECK: vshll.s16 q8, d16, #15
1088 # CHECK: vshll.s32 q8, d16, #31
1090 # CHECK: vshll.u8 q8, d16, #7
1092 # CHECK: vshll.u16 q8, d16, #15
1094 # CHECK: vshll.u32 q8, d16, #31
1096 # CHECK: vshll.i8 q8, d16, #8
1098 # CHECK: vshll.i16 q8, d16, #16
1100 # CHECK: vshll.i32 q8, d16, #32
Dneon.txt1261 # CHECK: vshll.s8 q8, d16, #7
1263 # CHECK: vshll.s16 q8, d16, #15
1265 # CHECK: vshll.s32 q8, d16, #31
1267 # CHECK: vshll.u8 q8, d16, #7
1269 # CHECK: vshll.u16 q8, d16, #15
1271 # CHECK: vshll.u32 q8, d16, #31
1273 # CHECK: vshll.i8 q8, d16, #8
1275 # CHECK: vshll.i16 q8, d16, #16
1277 # CHECK: vshll.i32 q8, d16, #32
/external/vixl/src/aarch32/
Ddisasm-aarch32.cc6581 void Disassembler::vshll(Condition cond, in vshll() function in vixl::aarch32::Disassembler
27973 vshll(CurrentCond(), in DecodeT32()
32224 vshll(CurrentCond(), in DecodeT32()
32367 vshll(CurrentCond(), in DecodeT32()
32510 vshll(CurrentCond(), in DecodeT32()
32653 vshll(CurrentCond(), in DecodeT32()
32852 vshll(CurrentCond(), in DecodeT32()
32898 vshll(CurrentCond(), in DecodeT32()
32944 vshll(CurrentCond(), in DecodeT32()
32990 vshll(CurrentCond(), in DecodeT32()
[all …]
Dassembler-aarch32.h5645 void vshll(Condition cond,
5650 void vshll(DataType dt, QRegister rd, DRegister rm, const DOperand& operand) { in vshll() function
5651 vshll(al, dt, rd, rm, operand); in vshll()
Ddisasm-aarch32.h2323 void vshll(Condition cond,
Dassembler-aarch32.cc24181 void Assembler::vshll(Condition cond, in vshll() function in vixl::aarch32::Assembler
24236 Delegate(kVshll, &Assembler::vshll, cond, dt, rd, rm, operand); in vshll()
Dmacro-assembler-aarch32.h9820 vshll(cond, dt, rd, rm, operand); in Vshll()
/external/libjpeg-turbo/simd/
Djsimd_arm_neon.S584 vshll.s16 q3, ROW0L, #13
601 vshll.s16 q5, ROW0L, #13
621 vshll.s16 q3, ROW4L, #13
638 vshll.s16 q5, ROW4L, #13
1141 vshll.s16 q14, \x4, #15
1224 vshll.s16 q14, d4, #15
1225 vshll.s16 q15, d5, #15
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DARMInstrNEON.td4126 defm VSHLLs : N2VLSh_QHS<0, 1, 0b1010, 0, 0, 1, "vshll", "s", NEONvshlls>;
4127 defm VSHLLu : N2VLSh_QHS<1, 1, 0b1010, 0, 0, 1, "vshll", "u", NEONvshllu>;
4138 def VSHLLi8 : N2VLShMax<1, 1, 0b110010, 0b0011, 0, 0, 0, "vshll", "i8",
4140 def VSHLLi16 : N2VLShMax<1, 1, 0b110110, 0b0011, 0, 0, 0, "vshll", "i16",
4142 def VSHLLi32 : N2VLShMax<1, 1, 0b111010, 0b0011, 0, 0, 0, "vshll", "i32",
/external/llvm/lib/Target/ARM/
DARMInstrNEON.td5431 defm VSHLLs : N2VLSh_QHS<0, 1, 0b1010, 0, 0, 1, "vshll", "s",
5433 defm VSHLLu : N2VLSh_QHS<1, 1, 0b1010, 0, 0, 1, "vshll", "u",
5445 def VSHLLi8 : N2VLShMax<1, 1, 0b110010, 0b0011, 0, 0, 0, "vshll", "i8",
5447 def VSHLLi16 : N2VLShMax<1, 1, 0b110110, 0b0011, 0, 0, 0, "vshll", "i16",
5449 def VSHLLi32 : N2VLShMax<1, 1, 0b111010, 0b0011, 0, 0, 0, "vshll", "i32",